27.1: A Novel Structure of AMLCD Panel Using Poly-Si CMOS TFT

Yang, Joon‐Young; Kim, S. H.; Park, Y. I.; Yoo, Joon-Mo; Lee, D. Y.; Oh, Jae Young; Hong, S. J.; Lee, J. I.; Oh, K. M.; Lee, S. W.; Kang, Hyun-Wook; Lim, Kyoung-Moon; Kim, C. D.; Yang, Myoung Soo; Chung, In‐Jae

doi:10.1889/1.2036204

Cited by 2 publications

(2 citation statements)

References 1 publication

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“…The shortcoming of their work is that metal is used as the storage electrode, which affects the aperture ratio. [5] Schalberger et al reported a five mask LTPS structure, which, however, did not have the indium tin oxide (ITO) layer for pixel electrode [6]. Accordingly, it is an incomplete structure for the proper operation of an LCD panel.…”

Section: Introductionmentioning

confidence: 99%

P‐52: A Novel Six‐Mask Low‐Temperature Polycrystalline Silicon Architecture for TFT‐LCD Application

Luo

He²,

Xu³

et al. 2020

Symp Digest of Tech Papers

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A novel six-mask LTPS TFT architecture is fabricated and used in TFT-LCD. The light shielding layer and organic layer are removed. Furthermore, the pixel indium tin oxide and source drain patterns are developed in one halftone mask. To solve the issue of high photo leakage current, we have investigated the generation mechanism of Iphoto and established guidelines for reducing it. The optical and electrical characteristics of the sixmask TFT-LCD are comparable to those of conventional TFT-LCD.

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Section: Introductionmentioning

confidence: 99%

P‐52: A Novel Six‐Mask Low‐Temperature Polycrystalline Silicon Architecture for TFT‐LCD Application

Luo

He²,

Xu³

et al. 2020

Symp Digest of Tech Papers

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“…From this point of view, remarkable progresses have been made to reduce mask steps in CMOS process. A seven-mask CMOS structure was proposed, instead of conventional nine-mask CMOS structure [1]. A more competitive six-mask CMOS structure was developed by our group [2], [3], and huge efforts have been made thereafter to achieve more simplified structure.…”

Section: Introductionmentioning

confidence: 99%

17.2: A Novel Five‐PhotoMask LTPS CMOS Structure with Improved Storage Capacitor for AMLCD Application

Oh¹,

Lee²,

Lee³

et al. 2010

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A novel five-mask low temperature polycrystalline silicon (LTPS) complementary metal oxide semiconductor (CMOS) structure was verified by manufacturing the thin film transistor (TFT) test samples using the proposed five-mask LTPS CMOS process. In integrating the five-mask CMOS structure, a selective storage area formation process was developed, without additional photo mask steps, to solve the sputtering damage encountered inevitably in the contact between polycrystalline silicon (p-Si) and storage metal. In addition, the selectively thin dielectric layer increased capacitance per unit area, and thus, increased the aperture ratio of AMLCD panel by reducing the capacitor area without reducing GI thickness in TFT

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27.1: A Novel Structure of AMLCD Panel Using Poly-Si CMOS TFT

Cited by 2 publications

References 1 publication

P‐52: A Novel Six‐Mask Low‐Temperature Polycrystalline Silicon Architecture for TFT‐LCD Application

P‐52: A Novel Six‐Mask Low‐Temperature Polycrystalline Silicon Architecture for TFT‐LCD Application

17.2: A Novel Five‐PhotoMask LTPS CMOS Structure with Improved Storage Capacitor for AMLCD Application

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