Digital predistortion (DPD) using baseband signals is commonly used for power amplifier linearization. This paper is devoted to this subject and aims to reduce DPD complexity. In this study, we propose a structure that allows to decrease the number of DPD parameters by using multiple blocks, with each one of them dedicated to characterizing the non-linear behavior and/or memory effects. Such a structure is based on the feedback Wiener system, involving a FIR filter used as a feedback path to reproduce the PA inverse dynamics. A memory polynomial block (MP) is inserted as the final element to minimize the modeling errors. A relevant model identification method, based on an iterative algorithm, has been developed as well. The proposed architecture is used for the linearization of a commercial class-AB LDMOS RF PA by NXP Semiconductors, in wideband communication systems. Comparison of performance with the conventional generalized memory polynomial model (GMP) shows that the proposed model offers similar results, with its advantage consisting in the reduced number of parameters.