56th Electronic Components and Technology Conference 2006
DOI: 10.1109/ectc.2006.1645701
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3-D Integrated Inductor on Silicon Backend using Compliant Interconnect Process for 10GHz Low Jitter VCO Application

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“…These technologies provide high-Q passive devices but fail to meet low-cost requirements and often need extra packaging steps for use. Silicon etching [5], ground shield patterning [6] [7], spacers [8] and micromachining for suspended planar or 3D structures [9]- [12] are other technologies that enable direct above-IC integration of high-Q inductors. However, these approaches are either complex and expensive or incompatible with standard silicon technologies which use low resistivity substrate.…”
Section: Introductionmentioning
confidence: 99%
“…These technologies provide high-Q passive devices but fail to meet low-cost requirements and often need extra packaging steps for use. Silicon etching [5], ground shield patterning [6] [7], spacers [8] and micromachining for suspended planar or 3D structures [9]- [12] are other technologies that enable direct above-IC integration of high-Q inductors. However, these approaches are either complex and expensive or incompatible with standard silicon technologies which use low resistivity substrate.…”
Section: Introductionmentioning
confidence: 99%