3D Heterogeneous Integration with Multiple Stacking Fan-Out Package

Hsu, Feng-Cheng; Lin, Julia C.; Chen, Shuo-Mao; Lin, Po-Yao; Fang, Jerry; Wang, Jinhua; Jeng, Shin-Puu

doi:10.1109/ectc.2018.00058

Cited by 30 publications

(5 citation statements)

References 3 publications

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“…To meet these new needs, a paradigm shift in design architecture was required, which gave rise to the invention of 3D stacked devices. In comparison to current packaging solutions, hybrid bonding of chiplets will provide an order of magnitude higher B/W between chiplets at lower power and latency [5,6].…”

Section: D Packaging For Heterogeneous Integrationmentioning

confidence: 99%

Navigating The Integrated Circuit Industry: Definitions, Evolution, Innovations, And Challenges

2024

HSET

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Now, the integrated circuit (IC) industry is experiencing rapid growth, and some of its associated technologies play vital roles in our everyday lives. This paper aims to provide comprehensive insights into the entire IC industry by elaborating on various aspects. First and foremost, it elucidates the definition, development history, and current status of integrated circuits (ICs). Subsequently, it delves into intricate details regarding three state-of-the-art technologies linked to ICs, all of which are conveyed with their full names for clarity: Integrated Circuits in Silicon Germanium (SiGe) Bipolar Complementary Metal-Oxide-Semiconductor (BiCMOS) for Millimeter-Wave and Terahertz Bioanalyzers, 3D Packaging for Heterogeneous Integration, and, once again, 3D Packaging for Heterogeneous Integration. To conclude, this paper provides an in-depth exploration of the present challenges faced by the integrated circuit industry and the prospective hurdles that could impact the industry's future trajectory. By reading this paper, you can swiftly gain a comprehensive understanding of integrated circuits, covering aspects such as their definition, historical evolution, current status, cutting-edge technologies, and the prevailing challenges that demand attention.

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Section: D Packaging For Heterogeneous Integrationmentioning

confidence: 99%

Navigating The Integrated Circuit Industry: Definitions, Evolution, Innovations, And Challenges

2024

HSET

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“…3.1.2 Thermal Crosstalk. In advanced heterogeneous packages, heat generation in each device can affect neighboring units [28,46,78,81,83,107]. In the 2.5D package platform, the logic device and HBMs are placed within 500 lm because of signal integrity/power integrity (SI/PI) performance.…”

Section: Thermal Management Challenges Due To Multichipmentioning

confidence: 99%

Recent Advances in Thermal Metamaterials and Their Future Applications for Electronics Packaging

Kim

Ren

Yuksel³

et al. 2020

Journal of Electronic Packaging

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Thermal metamaterials exhibit thermal properties that do not exist in nature but can be rationally designed to offer unique capabilities of controlling heat transfer. Recent advances have demonstrated successful manipulation of conductive heat transfer and led to novel heat guiding structures such as thermal cloaks, concentrators, etc. These advances imply new opportunities to guide heat transfer in complex systems and new packaging approaches as related to thermal management of electronics. Such aspects are important, as trends of electronics packaging toward higher power, higher density, and 2.5D/3D integration are making thermal management even more challenging. While conventional cooling solutions based on large thermal-conductivity materials as well as heat pipes and heat exchangers may dissipate the heat from a source to a sink in a uniform manner, thermal metamaterials could help dissipate the heat in a deterministic manner and avoid thermal crosstalk and local hot spots. This paper reviews recent advances of thermal metamaterials that are potentially relevant to electronics packaging. While providing an overview of the state-of-the-art and critical 2.5D/3D-integrated packaging challenges, this paper also discusses the implications of thermal metamaterials for the future of electronic packaging thermal management. Thermal metamaterials could provide a solution to nontrivial thermal management challenges. Future research will need to take on the new challenges in implementing the thermal metamaterial designs in high-performance heterogeneous packages to continue to advance the state-of-the-art in electronics packaging.

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“…40. Figure 41 shows another example [145], where six layers of chips are vertically interconnected together without TSVs. FOWLP has been used to build the RDLs to fan-out the circuitries to the peripheral of the packages and the vertical interconnects are through the Cu-pillar and microbumps.…”

Section: Opportunities For Fan-out Wafer-level Packagingmentioning

confidence: 99%

Recent Advances and Trends in Fan-Out Wafer/Panel-Level Packaging

Lau

2019

Journal of Electronic Packaging

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The recent advances and trends in fan-out wafer/panel-level packaging (FOW/PLP) are presented in this study. Emphasis is placed on: (A) the package formations such as (a) chip first and die face-up, (b) chip first and die face-down, and (c) chip last or redistribution layer (RDL)-first; (B) the RDL fabrications such as (a) organic RDLs, (b) inorganic RDLs, (c) hybrid RDLs, and (d) laser direct imaging (LDI)/printed circuit board (PCB) Cu platting and etching RDLs; (C) warpage; (D) thermal performance; (E) the temporary wafer versus panel carriers; and (F) the reliability of packages on PCBs subjected to thermal cycling condition. Some opportunities for FOW/PLP will be presented.

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3D Heterogeneous Integration with Multiple Stacking Fan-Out Package

Cited by 30 publications

References 3 publications

Navigating The Integrated Circuit Industry: Definitions, Evolution, Innovations, And Challenges

Navigating The Integrated Circuit Industry: Definitions, Evolution, Innovations, And Challenges

Recent Advances in Thermal Metamaterials and Their Future Applications for Electronics Packaging

Recent Advances and Trends in Fan-Out Wafer/Panel-Level Packaging

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