3D Simulation for Melt Laser Anneal Integration in FinFET’s Contact

Tabata, Toshiyuki; Curvers, Benoit; Huet, Karim; Chew, Soon Aik; Everaert, Jean‐Luc; Horiguchi, N.

doi:10.1109/jeds.2020.3030923

Cited by 3 publications

(2 citation statements)

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“…8,[12][13][14][15] However, the reachable activation level seems dominated by the solidification velocity 14) so that locally varying heat dissipation in a real device structure may strongly affect it. 16) In addition, melting of doped Si degrades surface morphology. 3,14) These aspects might be a hindrance of integrating melt LA into a transistor fabrication flow.…”

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confidence: 99%

Microsecond non-melt UV laser annealing for future 3D-stacked CMOS

Tabata

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Thuries

et al. 2022

Appl. Phys. Express

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Three-dimensional (3D) CMOS technology encourages the use of UV laser annealing (UV-LA) because the shallow absorption of UV light into materials and the process timescale typically from nanoseconds (ns) to microseconds (µs) strongly limit the vertical heat diffusion. In this work, µs UV-LA solid phase epitaxial regrowth (SPER) demonstrated an active carrier concentration surpassing 1 × 1021 at./cm3 in an arsenic ion-implanted silicon-on-insulator substrate. After the subsequent ns UV-LA known for improving CMOS interconnect, only a slight (⁓5%) sheet resistance increase was observed. The results open a possibility to integrate UV-LA at different stages of 3D-stacked CMOS.

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confidence: 99%

Microsecond non-melt UV laser annealing for future 3D-stacked CMOS

Tabata

Rozé

Thuries

et al. 2022

Appl. Phys. Express

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“…However, it should be noted that it is in a trade-off with the efficiency of surface segregation (i.e., k becomes closer to the unity when increasing V), and a compromise would have to be found when integrating ns UV-LA LPER into real CMOS contact modules. Recently, we have accessed it by using Sb doping for 14 nm node generation FinFET's Si-based contact (Figure 9) [52]. Although there is no electrical data, the segregation of ion-implanted Sb atoms at the top of the fin structure is clearly evidenced (Figure 9d,e, see the position indicated by the arrow "S/D epi top surface").…”

Section: Dopant Activation By Liquid Phase Epitaxial Regrowth (Lper)mentioning

confidence: 99%

Recent Progresses and Perspectives of UV Laser Annealing Technologies for Advanced CMOS Devices

et al. 2022

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The state-of-the-art CMOS technology has started to adopt three-dimensional (3D) integration approaches, enabling continuous chip density increment and performance improvement, while alleviating difficulties encountered in traditional planar scaling. This new device architecture, in addition to the efforts required for extracting the best material properties, imposes a challenge of reducing the thermal budget of processes to be applied everywhere in CMOS devices, so that conventional processes must be replaced without any compromise to device performance. Ultra-violet laser annealing (UV-LA) is then of prime importance to address such a requirement. First, the strongly limited absorption of UV light into materials allows surface-localized heat source generation. Second, the process timescale typically ranging from nanoseconds (ns) to microseconds (μs) efficiently restricts the heat diffusion in the vertical direction. In a given 3D stack, these specific features allow the actual process temperature to be elevated in the top-tier layer without introducing any drawback in the bottom-tier one. In addition, short-timescale UV-LA may have some advantages in materials engineering, enabling the nonequilibrium control of certain phenomenon such as crystallization, dopant activation, and diffusion. This paper reviews recent progress reported about the application of short-timescale UV-LA to different stages of CMOS integration, highlighting its potential of being a key enabler for next generation 3D-integrated CMOS devices.

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