In this paper we report on the possibility to use particle-based Monte Carlo techniques to incorporate all relevant quantum effects in the simulation of semiconductor nanotransistors. Starting from the conventional Monte Carlo approach within the semi-classical Boltzmann approximation, we develop a multi-subband description of transport to include quantization in ultra-thin body devices. This technique is then extended to the particle simulation of quantum transport within the Wigner formulation. This new simulator includes all expected quantum effects in nano-transistors and all relevant scattering mechanisms which are taken into account the same way as in Boltzmann simulation. This work is illustrated by analyzing the device operation and performance of multi-gate nano-transistors in a convenient range of channel lengths and thicknesses to separate the influence of all relevant effects: significant quantization effects occurs for thickness smaller than 5 nm and wave mechanical transport effects manifest themselves for channel length smaller than 10 nm. We also show that scattering mechanisms still have an important influence in nanoscaled double-gate transistors, both in the intrinsic part of the channel and in the resistive lateral extensions.

Damage evolution and dopant distribution during nanosecond laser thermal annealing of ion implanted silicon have been investigated by means of transmission electron microscopy, secondary ion mass spectrometry, and atom probe tomography. Different melting front positions were realized and studied: nonmelt, partial melt, and full melt with respect to the as-implanted dopant profile. In both boron and silicon implanted silicon samples, the most stable form among the observed defects is that of dislocation loops lying close to (001) and with Burgers vector parallel to the [001] direction, instead of conventional {111} dislocation loops or {311} rod-like defects, which are known to be more energetically favorable and are typically observed in ion implanted silicon. The observed results are explained in terms of a possible modification of the defect formation energy induced by the compressive stress developed in the nonmelted regions during laser annealing.

For the first time the maximum thermal budget of in-situ doped source/drain State Of The Art (SOTA) FDSOI bottom MOSFET transistors is quantified to ensure transistors stability in Sequential 3D (CoolCube TM ) integration. We highlight no degradation of Ion/Ioff trade-off up to 550°C. Thanks to both metal gate work-function stability especially on short devices and silicide stability improvement, the top MOSFET temperature could be relaxed up to 500°C. Laser anneal is then considered as a promising candidate for junctions activation. Based on in-depth morphological and electrical characterizations it demonstrates very promising results for high performance Sequential 3D integration.

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