5 V input level shifter circuit for IGZO thin-film transistors

Abstract

A 5 V input level shifter circuit based on depletion-mode In-Ga-Zn-O thin-film transistors (TFT) worked up to 100 kHz. By employing metal-insulator-semiconductor (MIS) active capacitor, we enhanced the bootstrapping effect and reduced the rise time of the output signal. SPICE simulation results showed that the proposed level shifter worked for wide threshold voltage range from !2 V to D1 V and the fabricated circuit exhibited the propagation delay t plh and t phl of 0.6 µsec and 0.3 µsec respectively.

P‐48: An Oxide‐Semiconductor (OS) FET‐based Low‐Power Level Shifter Combined with OS LSI Technology‐based Display‐Controller COG for a Low‐Power OS Display System

“…This technology will be explained below. Figure 3 shows circuit diagrams of the conventional OS FET level shifter [22] and the newly developed OS FET level shifter. The conventional level shifter in Fig.…”

“…In view of the above, this study proposes a low-power level shifter that is configured with the high-voltage OS FETs of a backplane and is capable of constituting a low-power OS display system. The level shifter has a smaller area than a conventional model [22], and its power consumption is lowered by 26%. A low-power OS display system will be achieved by providing a low-voltage OS display-controller COG with embedded DOSRAM (i.e., the OS LSI) together with the level shifter.…”