50 nm-Gate All Around (GAA)-Silicon On Nothing (SON)-devices: a simple way to co-integration of GAA transistors within bulk MOSFET process

Introduction

“…The principal advantage with this structure is the planar bulk-like layout and process. In the tied double-gate planar structure [85,86], the current flows horizontally (parallel to the plane of the substrate) between the source and drain along opposite horizontal channel surfaces. The principal advantages of this structure reside in the potential simplicity of the process and in the compactness of the layout as well as in its compatibility with bulk layout.…”

3D nanowire gate-all-around transistors: Specific integration and electrical features

“…In the literature, some solutions are given to obtain a self-alignment between the gate and the source and drain by forming lateral cavities [6,7]. These solutions use dummy gates in SiGe which are etched selectively to Si and replaced by the gate stack.…”

“…This discrete effective transistor width introduces some restrictions in complementary metal oxide semiconductor (CMOS) devices layout [4]. We proposed a fin Field Effect Transistor (fin-FET) -like process [5] combined with silicon-on-nothing (SON) technologies [6,7] to obtain a matrix of suspended stacked nanowires CMOS devices ( Figs. 1 and 2).…”

Impact of Trap Position on Random Telegraph Noise in a 70-Å Nanowire Field-Effect Transistor

“…As the critical dimensions shrink to a few nanometers, non-conventional device structures that can successfully suppress the short channel effect have been proposed. For example, doublegate FinFET [1,2], Fully-Depleted Silicon-on-Insulator (FD-SOI) MOSFET [3,4], and gate-all-around (GAA) MOSFET [5][6][7][8][9][10] have attracted much attention in the industry. Among them, the nanowire FET has the highest gate-to-channel capacitive coupling primarily because the channel is surrounded and controlled by the gate in all directions, and therefore, silicon nanowire architecture is the most attractive structure for sub-10-nm CMOS technology.…”