500 MHz differential latched current comparator for calibration of current steering DAC

Sarkar, Santanu; Banerjee, Swapna

doi:10.1109/techsym.2014.6808066

Cited by 10 publications

(3 citation statements)

References 5 publications

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“…Another approach is translating the current to voltage using a differential transimpedance preamplifier (DTIA) which provides a better noise reduction according to the differential input design [38], [61]. The design in [61] is slightly faster than our work, but it has approximately 4 times higher power requirements.…”

Section: Discussionmentioning

confidence: 93%

“…However, it contains many large resistors which contributes area overhead and prone to the temperature and process variations. The design in [38] also implements DTIA. It is 3 times faster but needs 35 times higher power due to its static sub-circuits, such as subtractor and amplifiers.…”

Section: Discussionmentioning

confidence: 99%

“…It is used for demonstrating the impact of temperature on the memristance reading process. The decoder uses a comparator which is based on current mode circuits and thus inherits their intrinsic advantages over the voltage one, such as like low power, wide bandwidth and less susceptible to power supply fluctuation [37], [38]. The comparator is designed to provide the resolution scaling based on the available power budget and supports both synchronous and asynchronous schemes.…”

Section: Introductionmentioning

confidence: 99%

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Toward Designing Thermally-Aware Memristance Decoder

Bunnam

Soltan

Sokolov

et al. 2019

IEEE Trans. Circuits Syst. I

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Memristors are intensively proposed in many applications, such as biosensors and machine learning. Regarding their analog characteristics, memristance decoder is, therefore, an essential part for every memristor-based system. As memristor is a temperature sensitive device, this work proposes a memristance decoder circuit with self-temperature calibration. Its main building block is a comparator which is based on current mode circuit to achieve high performance at low power. The design provides configurable precision based on the available energy and supports both synchronous and asynchronous schemes. Moreover, the VTEAM model is modified to include the temperature effect on the memristance in the analysis. The simulation results, based on UMC 65nm low-leakage CMOS technology, show the following comparator's characteristics: 1.70% maximum offset, 2.91ns worst case latency, 343M Hz maximum frequency and 48.79f J maximum energy per comparison. Monte Carlo simulation shows the metastable state in determining the memristor value. This can be solved by extending the clock period or applying a metastability resolver. The proposed memristor model reveals that memristance at high resistive state degrades quadratically with the rise of the temperature and at 85°C nearly reaches the memristance of low resistive state. The possibility of decoding error due to the temperature effect is demonstrated via simulations.

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Section: Discussionmentioning

confidence: 93%

Section: Discussionmentioning

confidence: 99%