64-kb Hybrid Josephson-CMOS 4 Kelvin RAM With 400 ps Access Time and 12 mW Read Power

Duzer, T. Van; Zheng, Lizhen; Whiteley, S.R.; Kim, Hoki; Kim, Jae-Woo; Meng, Xiaofan; Ortlepp, Thomas

doi:10.1109/tasc.2012.2230294

Cited by 69 publications

(39 citation statements)

References 12 publications

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“…Recently, a cryogenic 64 kbit hybrid JJ-CMOS RAM was successfully demonstrated [28]. This hybrid RAM can fill a niche in the memory hierarchy, in which access time requirements are less demanding.…”

Section: Introductionmentioning

confidence: 99%

Magnetic Josephson Junctions With Superconducting Interlayer for Cryogenic Memory

Vernik

Bolginov

Bakurskiy

et al. 2013

IEEE Trans. Appl. Supercond.

146

105

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We investigate a Magnetic Josephson Junction (MJJ) -a superconducting device with ferromagnetic barrier for a scalable high-density cryogenic memory compatible with energyefficient single flux quantum (SFQ) circuits. The superconductorinsulator-superconductor-ferromagnet-superconductor (SIS FS) MJJs are analyzed both experimentally and theoretically. We found that the properties of SIS FS junctions fall into two distinct classes based on the thickness of S layer. We fabricate Nb-Al/AlOx-Nb-PdFe-Nb SIS FS MJJs using a co-processing approach with a combination of HYPRES and ISSP fabrication processes. The resultant SIS FS structure with thin superconducting S -layer is substantially affected by the ferromagnetic layer as a whole. We fabricate these type of junctions to reach the device compatibility with conventional SIS junctions used for superconducting SFQ electronics to ensure a seamless integration of MJJ-based circuits and SIS JJ-based ultra-fast digital SFQ circuits. We report experimental results for MJJs, demonstrating their applicability for superconducting memory and digital circuits. These MJJs exhibit I c R n product only ∼30% lower than that of conventional SIS junctions co-produced in the same fabrication. Analytical calculations for these SIS FS structures are in a good agreement with the experiment. We discuss application of MJJ devices for memory and programmable logic circuits.Index Terms-Energy efficient, memory devices, proximity effect, RAM, single flux quantum, superconducting logic elements.

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Section: Introductionmentioning

confidence: 99%

Magnetic Josephson Junctions With Superconducting Interlayer for Cryogenic Memory

Vernik

Bolginov

Bakurskiy

et al. 2013

IEEE Trans. Appl. Supercond.

146

105

View full text Add to dashboard Cite

show abstract

“…While there has been considerable progress in superconductor fabrication technology [6], [7], automated design tools [8], and circuit complexity [9], [10], the lack of a suitable memory solution has, hitherto, remained a major risk to the eventual integration of superconducting logic into highperformance computing systems [3]. Recent efforts to advance the cryogenic memory state-of-the-art beyond superconducting quantum interference device (SQUID)-based memories [11] include hybrid Josephson-CMOS [12] and magnetic [13], [14] memory solutions. Here, we report on an experimental demonstration of a cryogenic magnetic memory unit cell built in a superconducting integrated circuit, paving the way to a memory solution that is dense, fast, robust, energy-efficient, and compatible with superconducting logic fabrication and signal levels.…”

Section: Introductionmentioning

confidence: 99%

Experimental Demonstration of a Josephson Magnetic Memory Cell With a Programmable $\pi$-Junction

et al. 2018

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We experimentally demonstrate the operation of a Josephson magnetic random access memory unit cell, built with a Ni80Fe20/Cu/Ni pseudo spin-valve Josephson junction with Nb electrodes and an integrated readout SQUID in a fully planarized Nb fabrication process. We show that the parallel and anti-parallel memory states of the spin-valve can be mapped onto a junction equilibrium phase of either zero or π by appropriate choice of the ferromagnet thicknesses, and that the magnetic Josephson junction can be written to either a zero-junction or π-junction state by application of write fields of approximately 5 mT. This work represents a first step towards a scalable, dense, and power-efficient cryogenic memory for superconducting high-performance digital computing.

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“…The periphery circuits can be responsible for a significant fraction of RAM energy consumption and latency [17]- [21]. If not addressed, inefficiencies in RAM would eliminate most of the benefits of processor improvements [1].…”

Section: Introductionmentioning

confidence: 99%

ERSFQ 4-to-16 Decoder for Energy-Efficient RAM

Kirichenko

Vernik

Mukhanov

et al. 2015

IEEE Trans. Appl. Supercond.

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We designed, fabricated, and demonstrated an energy-efficient ERSFQ 4-bit decoder. The first version of the decoder is designed and fabricated using HYPRES legacy 1.0-μm four-layer 4.5-kA/cm 2 process. It occupies an area of 700 μm × 1800 μm, which is to be reduced to 160 μm × 400 μm once fabricated using HYPRES's RIPPLE-2 0.25-μm six-layer process. The decoder features ±13% dc bias current operating margins and below 70-aJ energy consumption per one address select operation. We report test results of the decoder and discuss its future implementation in cryogenic random access memory devices, including magnetic memory devices.Index Terms-Cryogenic magnetic memory, energy-efficient logic, random access memory, RSFQ, SFQ.

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64-kb Hybrid Josephson-CMOS 4 Kelvin RAM With 400 ps Access Time and 12 mW Read Power

Cited by 69 publications

References 12 publications

Magnetic Josephson Junctions With Superconducting Interlayer for Cryogenic Memory

Magnetic Josephson Junctions With Superconducting Interlayer for Cryogenic Memory

Experimental Demonstration of a Josephson Magnetic Memory Cell With a Programmable $\pi$-Junction

ERSFQ 4-to-16 Decoder for Energy-Efficient RAM

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