2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS) 2013
DOI: 10.1109/lascas.2013.6518996
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7-bit 2.56 GS/s folding ADC with nanometric compatible architecture by using a high dynamic I/O folding amplifier

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“…Different folding ADCs reported in [2]- [5] utilized voltage mode folding amplifiers which had either sinusoidal or triangular folding characteristics. Folding ADC with such folding characteristics causes error in digitization [6] and needs extra error correction/compensation circuitry.…”
Section: Introductionmentioning
confidence: 99%
“…Different folding ADCs reported in [2]- [5] utilized voltage mode folding amplifiers which had either sinusoidal or triangular folding characteristics. Folding ADC with such folding characteristics causes error in digitization [6] and needs extra error correction/compensation circuitry.…”
Section: Introductionmentioning
confidence: 99%