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This paper presents a CMOS floating and tunable capacitance multiplier with a very large multiplication factor. The proposed design uses CCII and OTAs designed using MOSFETs biased in subthreshold region to provide low power consumption and high multiplication factor. TANNER TSPICE simulation tool is used to confirm the functionality of the design in 0.18µm TSMC CMOS technology. The circuit is powered using ±0.75V DC supply voltage. Simulation results indicate that the maximum multiplication factor is 3600 and the maximum error is 8.6%.

This paper presents a new design for active inductor (AI) realization in addition to capacitance and resistance multipliers. The design uses one current conveyor (CCII±) and one dual-output transconductance amplifier(DO-OTA) and a grounded capacitor. The functionality of the design is confirmed using experimental verification and simulation. Simulation results show that the realized inductance is tunable be tuned from few mH to 2H and more and the multiplication factor for the resistance multiplier is more than 2200 while the capacitance multiplication factor is around 500. A CMOS version of the AI is designed and simulated using Tanner Tspice in 0.18µm CMOS technology. The simulation results confirm the functionality of the design.INDEX TERMS Tunable active inductance, resistance multiplier, capacitance multiplier, integrated circuits.

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