800 nW 43 nV/√Hz neural recording amplifier with enhanced noise efficiency factor

Liu, L.; Zou, Xiaodan; Goh, Wang Ling; Ramamoorthy, R.; Dawe, Gavin S.; Je, Minkyu

doi:10.1049/el.2012.0685

Cited by 48 publications

(25 citation statements)

References 5 publications

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“…The Inversion Coefficient (IC) can be calculated, based on the ratio of drain current (I D ) to the moderate inversion (IC = 1, both currents are equal) characteristic current (I S ) [3].…”

Section: Proposed Low Noise Ota Designmentioning

confidence: 99%

“…The challenging issue is to design a preamplifier with low power, low noise and optimized area. The amplifier should be stable and should collect undistorted signal by rejecting large DC offset voltage due to the interface between the electrode and the tissue [3]. Due to bio-compatibility, the existing circuitry still requires improvement in terms of: area, noise level, heat and power dissipation [3].…”

Section: Introductionmentioning

confidence: 99%

“…The amplifier should be stable and should collect undistorted signal by rejecting large DC offset voltage due to the interface between the electrode and the tissue [3]. Due to bio-compatibility, the existing circuitry still requires improvement in terms of: area, noise level, heat and power dissipation [3]. For instance, the power consuming area of 80 mW/cm 2 , produces a heat flux which may cause necrosis in muscle tissue [4].…”

Section: Introductionmentioning

confidence: 99%

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Low Noise Low Power CMOS Telescopic-OTA for Bio-Medical Applications

2016

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Abstract:The preamplifier block is crucial in bio-medical signal processing. The power intensive Operational Transconductance Amplifier (OTA) is considered, and the performance of preamplifier is studied. A low noise and low power telescopic OTA is proposed in this work. To reduce the noise contribution in the active load transistors, source degeneration technique is incorporated in the current stealing branch of the OTA. The OTA design optimization is achieved by g m /I d methodology, which helps to determine the device geometrical parameters (W/L ratio). The proposed design was implemented in CMOS 90 nm with bias current and supply voltage of 1.6 µA and 1.2 V, respectively. The post layout simulation results of the proposed amplifier gave a gain of 62 dB with phase margin 57°, CMRR 78 dB, input referred noise 3.2 µVrms, Noise Efficiency Factor (NEF) 1.86 and power consumption of 1.92 µW.

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“…The Inversion Coefficient (IC) can be calculated, based on the ratio of drain current (I D ) to the moderate inversion (IC = 1, both currents are equal) characteristic current (I S ) [3].…”

Section: Proposed Low Noise Ota Designmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Low Noise Low Power CMOS Telescopic-OTA for Bio-Medical Applications

2016

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“…A differential feedback amplifier exploiting current reuse as shown in Fig.1 (c) has been presented in [10,11] to improve the inaccurate gain, limited linearity and PSRR observed in [9]. As shown Fig.1 (d), the core amplifier employs a differential current-reuse first stage, and a second gain stage to increase the DC gain, improving feedback gain accuracy and linearity.…”

Section: A Current-reuse Techniquesmentioning

confidence: 99%

“…The common mode voltage is sensed from a fractional replica (M 11-16 ) of the main branch at node M and compared with the reference by amplifier A 2 . Since the input biasing voltage (for M 1-4 ) is the same as the one of the output nodes, as shown in Fig.1 (c), in the replica branch the gates of M 11,12 are also connected to node M. Thereby the current sources (M 10,16 ) are regulated to stabilize the common mode voltage. Careful layout guarantees that the replica is an accurate fraction of the main branch to prevent offset.…”

Section: B Biasing and Common Mode Feedback Circuitmentioning

confidence: 99%

A 430nW 64nV/vHz current-reuse telescopic amplifier for neural recording applications

Song

Rooijakkers

Harpe

et al. 2013

2013 IEEE Biomedical Circuits and Systems Conference (BioCAS)

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This paper presents a low-power low-noise amplifier for neural recording applications. A single-stage current-reuse telescopic topology is proposed to achieve high DC gain and improve the noise efficiency factor (NEF) while allowing the amplifier to be scaled for high bandwidth sensing applications and/or to achieve lower thermal noise floor. The design is fabricated in a standard 0.18µm CMOS process and occupies an active area of 0.16mm 2 . Experimental measurements show a 430nW power consumption from a 1.2V supply, a thermal noise floor of 63.8nV/√ and a corresponding NEF of 1.5.

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