“…In contrast, in the stateof-the-art design, many different f CLK 's, V DD 's, and V TH 's are used within a chip and they are dynamically changed to minimize the energy. Such temporal-spatial fine-grained control includes the dynamic voltage scaling [2], the dynamic frequency scaling [3], the power gating, the clock gating, the body biasing, the local gate overdrive [4], and the quick wakeup circuits [5]. converter, logic circuits, SRAM, and RF circuits for the temporal-spatial fine-grained control to minimize the energy.…”