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Cited by 28 publications
(11 citation statements)
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“…Examples of the successful integration of various electronic and optoelectronic components with silicon integrated circuits ͑ICs͒ include germanium p-type metal-oxide semiconductor field-effect transistors ͑p-MOSFETs͒, 1 silicon germanium on insulator ͑SGOI͒ for high-speed and low-power applications, 2 optical links of GaAs p-i-n light-emitting diode ͑LED͒ and detector diodes, 3 as well as Al x Ga 1−x As/ In x Ga 1−x As LEDs and lasers. 4 It is natural to consider what system-level function may be integrated next onto the silicon CMOS platform.…”
Section: Introductionmentioning
confidence: 99%
“…Examples of the successful integration of various electronic and optoelectronic components with silicon integrated circuits ͑ICs͒ include germanium p-type metal-oxide semiconductor field-effect transistors ͑p-MOSFETs͒, 1 silicon germanium on insulator ͑SGOI͒ for high-speed and low-power applications, 2 optical links of GaAs p-i-n light-emitting diode ͑LED͒ and detector diodes, 3 as well as Al x Ga 1−x As/ In x Ga 1−x As LEDs and lasers. 4 It is natural to consider what system-level function may be integrated next onto the silicon CMOS platform.…”
Section: Introductionmentioning
confidence: 99%
“…To realize III-V materials integration on low-cost, mechanically stronger Si substrates, a number of research groups have investigated III-V growth on Si for optoelectronic and microelectronic applications. 10,11 The main challenges of producing high-quality III-V materials on Si are: (i) the large lattice mismatch between the two materials [in the case of gallium arsenide (GaAs), the mismatch is 4.1%], and (ii) the formation of antiphase domains (APDs) due to the polar compound semiconductor growth on a nonpolar elemental structure. In an attempt to resolve challenge (i), germanium (Ge), which has a lattice constant perfectly matched to GaAs (0.07% at 300 K) and superior electron and hole mobility compared with Si, can be grown on Si to provide a buffer layer for integration and fabrication of GaAsbased devices on a Si substrate.…”
Section: Introductionmentioning
confidence: 99%
“…In this case, the stress on a crystal surface can provide a natural driving force for the nanostructure formation and the threedimensional island formation for the lattice mismatched epitaxial growth on the substrates. At the initial stage of the heteroepitaxy growth of the AlSb layer on GaAs, a three-dimensional nucleation step is shown to take place before the surface is smoothed out by a thicker layer growth (7). The lower temperature AlSb buffer layer will reduce the surface diffusion; atoms can only diffuse a short distance before they are incorporated.…”
Section: Resultsmentioning
confidence: 98%