A 0.05-to-10GHz 19-to-22GHz and 38-to-44GHz SDR frequency synthesizer in 0.13&amp;#x03BC;m CMOS

Rong, Sujiang; Luong, Howard C.

doi:10.1109/isscc.2011.5746399

Cited by 5 publications

(7 citation statements)

References 7 publications

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“…From (7a), (7b), and (15), is increased with larger frequency ratio of and smaller coupling coefficient k, which uncovers that the notch-peak cancellation not only improves the stability of one-port oscillator as shown in [14], but also help reduce the phase noise of two-port oscillator. Finally, in (16) the differential output amplitude , is given by (17) where is equal to or around 2 without or with tail current shaping, respectively.…”

Section: Tank Quality Factors-qsmentioning

confidence: 99%

“…Making use of the analytical results, a dual-band transformerbased oscillator is designed for a wideband SDR frequency synthesizer as described in [17]. The target system requires dualband IQ signals from 3 GHz to 4.2 GHz and from 8.4 GHz to 12 GHz, to support all wireless communication channels from 47 MHz to 10 GHz and from 57 GHz to 66 GHz.…”

Section: Design Of Proposed Transformer-based Dual-band Q-vco For mentioning

confidence: 99%

“…It will be shown that, comparatively, oneport oscillators consume less power but need to be stabilized if the oscillation at the higher peak frequency is desired while two-port oscillators have no stability issue and have superior phase noise performance for a given output swing but is less efficient in converting the bias current to the tank swing. Incorporating both one-port and two-port configurations and exploiting their respective advantages at different frequency bands, a transformer-based dual-band Q-VCO is designed and optimized for a SDR frequency synthesizer, which targets to support existing wireless standards over 3-decade frequency range [17].…”

Section: Introductionmentioning

confidence: 99%

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Analysis and Design of Transformer-Based Dual-Band VCO for Software-Defined Radios

Rong

Luong

2012

IEEE Trans. Circuits Syst. I

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This work presents complete analysis of both oneport and two-port dual-band oscillators using transformer-based fourth-order LC tanks, from which critical parameters including oscillation frequency, start-up condition, tank Q, phase noise-are thoroughly derived and compared. It is shown that one-port oscillators consume less power than two-port counterparts but may suffer from stability problem which can be solved by a notch-peak cancellation technique. On the other hand, compared to one-port oscillators, two-port oscillators need to consume more power to obtain the same output swing, but their phase noise can be improved more linearly with increasing bias current, and thus they can achieve lower phase noise with a sufficiently large bias current. Based on the results, a dual-band quadrature voltage-controlled oscillator (Q-VCO) is systematically designed and implemented in a 0.13-m CMOS process for software-defined -radio (SDR) applications, in which the two-port topology is used in the low band for low phase noise and the one-port topology is employed in the high band for low power consumption. The prototype achieves a dual-band operation with in-phase and quadrature-phase (IQ) output signals from 2.7 GHz to 4.3 GHz and from 8.4 GHz to 12.4 GHz. At 3.6 GHz and 10.4 GHz, phase noise at 3 MHz offset of dBc/Hz and dBc/Hz and sideband-rejection ratios (SBR) of 37 dB and 41 dB are measured, respectively.

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Section: Tank Quality Factors-qsmentioning

confidence: 99%

Section: Design Of Proposed Transformer-based Dual-band Q-vco For mentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Analysis and Design of Transformer-Based Dual-Band VCO for Software-Defined Radios

Rong

Luong

2012

IEEE Trans. Circuits Syst. I

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“…Assuming that , the above equation ( 11) reaches the maximum value: (12) Note that for divide-by-2 operation, where (4) and ( 9) indicate that the locking range of the proposed ILFD becomes times smaller than that of the conventional ILFD. For divide-byoperations, ( 5) and ( 12) indicate that the locking range of the proposed ILFD varies from 0 to , which is an output-referred value.…”

Section: A Fractional-n Ilfd Using Self-synchronized Gatingmentioning

confidence: 99%

“…1(a)), multi-band carrier generation is accomplished using quadrature voltage-controlled oscillators (QVCOs). Single-side band (SSB) mixing and dividing the QVCO frequency division are then performed [9]- [12]. Quadrature voltage-controlled oscillators are constructed by cross-coupling two differential voltage-controlled oscillators (VCOs), thereby doubling the required chip area.…”

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confidence: 99%

A Compact and Low-Power Fractionally Injection-Locked Quadrature Frequency Synthesizer Using a Self-Synchronized Gating Injection Technique for Software-Defined Radios

Deng

Hara

Musa

et al. 2014

IEEE J. Solid-State Circuits

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This paper describes a compact and low-power frequency synthesizer with quadrature phase output for software-defined radios (SDRs). The proposed synthesizer is constructed using a core phase-locked loop (PLL), which is coupled with a fractional-N injection-locked frequency divider (ILFD). The fractional-N injection-locking operation is achieved by the proposed self-synchronized gating injection technique. The principle of a fractional-N injection locking operation and the concept of the proposed circuits are described in detail. Analysis for predicting the locking range of the proposed fractional-N ILFD is investigated. A digital calibration scheme is adopted in order to compensate for process, voltage, and temperature (PVT) variations. Implemented in a 65 nm CMOS process, this work demonstrates continuous frequency coverage from 10 MHz to 6.6 GHz with quadrature phase output while occupying a small area of 0.38 mm 2 and consuming 16 to 26 mW, depending on the output frequency. The normalized phase noise achieves -135.3 dBc/Hz at an offset of 3 MHz and -95.1 dBc/Hz at an offset of 10 kHz, both from a carrier frequency of 1.7 GHz.

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A fractional-N harmonic injection-locked frequency synthesizer with 10MHz–6.6GHz quadrature outputs for software-defined radios

Deng

Musa

Okada

et al. 2013

2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC)

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A 0.05-to-10GHz 19-to-22GHz and 38-to-44GHz SDR frequency synthesizer in 0.13μm CMOS

Cited by 5 publications

References 7 publications

Analysis and Design of Transformer-Based Dual-Band VCO for Software-Defined Radios

Analysis and Design of Transformer-Based Dual-Band VCO for Software-Defined Radios

A Compact and Low-Power Fractionally Injection-Locked Quadrature Frequency Synthesizer Using a Self-Synchronized Gating Injection Technique for Software-Defined Radios

A fractional-N harmonic injection-locked frequency synthesizer with 10MHz–6.6GHz quadrature outputs for software-defined radios

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A 0.05-to-10GHz 19-to-22GHz and 38-to-44GHz SDR frequency synthesizer in 0.13&#x03BC;m CMOS

Cited by 5 publications

References 7 publications

Analysis and Design of Transformer-Based Dual-Band VCO for Software-Defined Radios

Analysis and Design of Transformer-Based Dual-Band VCO for Software-Defined Radios

A Compact and Low-Power Fractionally Injection-Locked Quadrature Frequency Synthesizer Using a Self-Synchronized Gating Injection Technique for Software-Defined Radios

A fractional-N harmonic injection-locked frequency synthesizer with 10MHz&#x2013;6.6GHz quadrature outputs for software-defined radios

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Product

Resources

About

A 0.05-to-10GHz 19-to-22GHz and 38-to-44GHz SDR frequency synthesizer in 0.13μm CMOS

A fractional-N harmonic injection-locked frequency synthesizer with 10MHz–6.6GHz quadrature outputs for software-defined radios