A 0.35μm CMOS divide-by-2 quadrature injection-locked frequency divider based on voltage–current feedback topology

Jang, Sheng‐Lyang; Liu, Cheng-Chen; Yang, Ren-Kai; Shih, Chih‐Chieh; Chang, Chia‐Wei; Yeh, Hsiu-An

doi:10.1016/j.microrel.2010.01.020

Cited by 6 publications

(1 citation statement)

References 10 publications

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“…Owing to the importance of LR, great efforts have been made to increase the LR of the ILFDs by using different methods such as a higher order LC tank [17][18][19], dual injection metal-oxidesemiconductor field-effect transistor (MOSFET) [17,20,21], body injection technique [22,23], body-biased technique and current reuse topology [24], and voltage-current feedback topology [25]. This paper proposes a LR enhancement technique using a phase shifter circuit.…”

Section: Introductionmentioning

confidence: 99%

Locking range enhancement of divide‐by‐two injection locked frequency divider using phase shift technique

Mokhtabad

Ghonoodi

2017

IET Circuits, Devices & Systems

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This study presents the new locking range enhancement technique in divide-by-two injection locked frequency divider using a phase shifter circuit. The proposed divide-by-two phase shifter injection locking frequency divider (ILFD) is based on complementary metal-oxide-semiconductor (CMOS) cross-coupled oscillator with dual-resonance fourth-order LC-tank that is designed and simulated in 0.18 μm Taiwan Semiconductor Manufacturing Company (TSMC) CMOS technology. Using a phase shifter branch, an extra current with a new phase angle towards oscillator current will inject into the LC tank and moves the locking angle to a new and wider angle that leads to a wide locking range. In an analysis, the effect of the phase shifter circuit on the proposed ILFD has been explained. Simulation results show that at a supply voltage of 0.95 V, the phase shift ILFD consumes 7.32 mW power and at the incident signal power of 0 dBm the locking range is 5.25 GHz, from 4.3 to 9.55 GHz and the relative locking range is 75.81%.

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Section: Introductionmentioning

confidence: 99%

Locking range enhancement of divide‐by‐two injection locked frequency divider using phase shift technique

Mokhtabad

Ghonoodi

2017

IET Circuits, Devices & Systems

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A 0.35‐μm CMOS frequency divider implemented with the waffle injection MOSFET

Jang

Cheng

Chang

et al. 2011

Micro & Optical Tech Letters

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This letter proposes a CMOS injection‐locked frequency divider (ILFD) fabricated in a 0.35‐μm CMOS process.The ILFD circuit is realized with a cross‐coupled CMOS LC‐tank oscillator, and the external injection is carried out through the gate of a waffle MOSFET. The self‐oscillating ILFD is injection‐locked by second‐/fourth‐harmonic input to obtain the division order of two/four. Measurement results show that at the supply voltage of 0.9 V and at the incident power of 0 dBm, the locking range is from the incident frequency 4.25 to 6.35 GHz in the divide‐by‐2 mode. The locking range is from the incident frequency 10.75 to 11.25 GHz in the divide‐by‐4 mode. © 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26064

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Comparative Studies of Transistors- and Capacitors-Coupled QVCOs

Jin

2019

Proc. Natl. Acad. Sci., India, Sect. A Phys. Sci.

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A 0.35μm CMOS divide-by-2 quadrature injection-locked frequency divider based on voltage–current feedback topology

Cited by 6 publications

References 10 publications

Locking range enhancement of divide‐by‐two injection locked frequency divider using phase shift technique

Locking range enhancement of divide‐by‐two injection locked frequency divider using phase shift technique

A 0.35‐μm CMOS frequency divider implemented with the waffle injection MOSFET

Comparative Studies of Transistors- and Capacitors-Coupled QVCOs

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