A 0.7 V, 2.7 μW, 12.9 ppm/° C over 180° C CMOS subthreshold voltage reference

Abstract

Summary An all‐CMOS, low‐power, wide‐temperature‐range, curvature‐compensated voltage reference is presented. The proposed topology achieves a measured temperature coefficient of 12.9 ppm/°C for a wide temperature range of 180°C ( − 60 to 120°C) at a bias voltage of 0.7 V while consuming a mere 2.7 μW. The high‐order curvature compensation, which leads to a low‐temperature sensitivity of the reference voltage, is performed using a new, simple, but efficient methodology. The non‐linearities of an N‐type metal‐oxide‐semiconductor (NMOS) device operated in subthreshold are combined with the non‐linearities of two different kinds of polysilicon resistors, leading to the improved performance. The extended temperature range of this voltage reference gives it an important competitive advantage, especially at lower temperatures, where prior art designs' performance deteriorate abruptly. In addition, it utilizes an innovative trimming methodology whereby two trimmable resistors enable the tuning of both the overall slope and non‐linearities of the temperature sensitivity. The design was fabricated using TowerJazz Semiconductor's CMOS 0.18 μm technology, without using diodes or any external components such as compensating capacitors. It has an area of 0.023 mm2 and is suitable for high‐performance power‐aware applications as well as applications operating in extreme temperatures. Copyright © 2016 John Wiley & Sons, Ltd.

Low-Power, Subthreshold Reference Circuits for the Space Environment: Evaluated with γ-rays, X-rays, Protons and Heavy Ions

“…In this work, two versions of low-power, subthreshold reference circuits were extensively assessed for the space environment. The design and analog performance tests for non-radiation environments was presented in [17,51,87]. This paper focuses on the radiation tolerance of two subthreshold topologies.…”

“…The measured post-trimmed TC at a bias voltage of 0.75 V is 15 ppm/ The second reference circuit [17] is also a low-power, wide-temperature-range, curvature-compensated topology. The proposed topology achieves a temperature sensitivity of 12.9 ppm/ • C for a temperature range of 180 • C (−60 • C to 120 • C) at a bias voltage of 0.7 V, whilst consuming 2.7 µW.…”

“…The penalty of this approach is the higher design complexity and increased power consumption. More recently, low-power reference circuits utilize the metal oxide semiconductor (MOS) carrier mobility and threshold voltage temperature dependence in order to generate a first-order temperature-compensated reference voltage by summing a PTAT current and a complementary to absolute temperature (CTAT) current [14][15][16][17]. These circuits achieve low-power consumption but the TC is limited due to the non-linearities of MOS current components, which are higher when compared to the BJT ones.…”

“…In this work, we've designed and characterized two custom subthreshold reference circuits [17,51]. In addition to achieving competitive performance for commercial applications, the proposed topologies are designed to be radiation tolerant so as to perform reliably in the space environment.…”

A High-Accuracy Ultra-Low-Power Offset-Cancelation On-Off Bandgap Reference for Implantable Medical Electronics

“…Along with the continuous development of modern society and growing demand for high-quality life, implantable medical electronics are increasingly adopted in healthcare medical devices such as cardiac pacemakers [1][2][3]. These devices are usually battery powered and need to have ultra-low power consumption of a few microwatts or less [4][5][6][7][8]. Since they would probably be placed where they are not easily removed or recharged, they have to continue working for a relatively long time.…”