A 1.1 nW Energy-Harvesting System with 544 pW Quiescent Power for Next-Generation Implants

Abstract

This paper presents a nW power management unit (PMU) for an autonomous wireless sensor that sustains itself by harvesting energy from the endocochlear potential (EP), the 70–100 mV electrochemical bio-potential inside the mammalian ear. Due to the anatomical constraints inside the inner ear, the total extractable power from the EP is limited to 1.1–6.25 nW. A nW boost converter is used to increase the input voltage (30–55 mV) to a higher voltage (0.8 to 1.1 V) usable by CMOS circuits in the sensor. A pW Charge Pump circuit is used to minimize the leakage in the boost converter. Further, ultra-low-power control circuits consisting of digital implementations of input impedance adjustment circuits and Zero Current Switching circuits along with Timer and Reference circuits keep the quiescent power of the PMU down to 544 pW. The designed boost converter achieves a peak power conversion efficiency of 56%. The PMU can sustain itself and a duty-cyled ultra-low power load while extracting power from the EP of a live guinea pig. The PMU circuits have been implemented on a 0.18µm CMOS process.

A Dual-Output Thermoelectric Energy Harvesting Interface With 86.6% Peak Efficiency at 30 <inline-formula> <tex-math notation="LaTeX">$\mu {\text {W}}$ </tex-math> </inline-formula> and Total Control Power of 160 nW

“…1), where in both cases the body diode or the reverse conduction introduce some additional losses to the already present conduction losses [6], [12]. The leakage losses originate from the subthreshold leakage currents through the switches and may become significant when very low input power levels are targeted [13].…”

“…2) Switching Losses: The switching losses arise from driving the gate capacitances of the nMOS and pMOS switches, C N and C P , respectively, and the parasitic capacitance at node X, C X [13]. The switching losses can be approximated as:…”

An adaptive FET sizing technique for high efficiency thermoelectric harvesters

“…The proposed technique aims to mitigate the influence of the switching losses and maintain a high efficiency of the converter at low power levels. To achieve high efficiency, the optimal values of the power transistors' widths (W N and W P ), switching frequency (f s ) and inductor (L) can be determined [12], [13]. For these values, the sum of P loss and P ctrl is minimized.…”

“…3) for different values of the input voltage. The information about the input voltage level can be obtained directly from the control block without any additional circuitry, as in most of the low power energy harvesting systems [6]- [8], [12], [13]. This is because the duration of the pMOS switch ON time, τ P , generated by the control block, is directly proportional to the input voltage.…”

Review of Charge Pump Topologies for Micro Energy Harvesting Systems

“…While the DBB CP in (Kim et al, 2015) have benefits such as low processing cost, low start-up voltages at 150 mV, high efficiency of 72.5% at V IN = 450 mV and reduced leakages while maintaining high on current which promotes LV applications, the structure suffers from additional DBB control circuitry, usages of 6×10 nF off-chip capacitors and still a low 34% pumping efficiency at low voltages (180 mV). On the other hand, Bandyopadhyay et al (2014) proposed an ultra low power CP similar to Fig. 7b with a gate driver that reduces leakages based on Favrat et al (1998) voltage doublers model.…”