A 1.5 V single-supply one-transistor CMOS EEPROM

Gerber, B.; Martin, Jean-Christophe; Fellrath, J.

doi:10.1109/jssc.1981.1051573

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Area Efficient Multiple Pump System Design1

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1989

2016

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Cited by 19 publications

(1 citation statement)

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“…The pump in mode 1 has R PMP of T/C and V MAX of 3V DD Fig. 5.14 (a) Low noise pump design for wide V DD operation with variable number of stages (Gerber et al 1981). (b) Low noise pump design for wide V DD operation…”

Section: Area Efficient Multiple Pump System Designmentioning

confidence: 99%

On-chip High-Voltage Generator Design

Tanzawa

2016

Analog Circuits and Signal Processing

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Section: Area Efficient Multiple Pump System Designmentioning

confidence: 99%

On-chip High-Voltage Generator Design

Tanzawa

2016

Analog Circuits and Signal Processing

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Double and triple charge pumps with mos diodes: Dynamic models to an optimized design

Cataldo

Palumbo

1994

Circuit Theory & Apps

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In this paper the dynamic models of the double and triple charge pumps are extended to circuits in which the diodes are realized with an MOS transistor having a drain-gate contact. In this circuit realization we must take into account the influence of the source-substrate voltage on the threshold voltage Vt.The effects of the source-substrate voltage on the dynamic behaviour are analysed and discussed in detail. Moreover, simple equations allowing one to perform a pencil-and-paper area-efficient optimized design are developed from the two new models.The models obtained are also validated by SPICE simulation of the circuit assuming a typical CMOS 3 gm process.

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Chargepump Circuits

Berkhout¹

1997

Integrated Audio Amplifiers in BCD Technology

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A 1.5 V single-supply one-transistor CMOS EEPROM

Cited by 19 publications

References 9 publications

On-chip High-Voltage Generator Design

On-chip High-Voltage Generator Design

Double and triple charge pumps with mos diodes: Dynamic models to an optimized design

Chargepump Circuits

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