A 1.8-3.8-GHz Power Amplifier With 40% Efficiency at 8-dB Power Back-Off

Saad, Paul; Hou, Rui; Hellberg, Richard; Berglund, Bo

doi:10.1109/tmtt.2018.2867426

Cited by 53 publications

(22 citation statements)

References 40 publications

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“…In Doherty design, the bandwidth of a DPA can be defined with power contours relating to a certain back-off output power level, which is called "power bandwidth" [18]- [20]. In addition, the back-off output power level of a DPA can be defined as, BO p = 10 log 10 (2γ) (17) where γ represents the ratio of the back-off resistance related to R opt . The δ dB power bandwidth can be defined by determining the frequency range in which the back-off impedance stays within the δ dB power contour on the Smith chart.…”

Section: B Bandwidth Analysismentioning

confidence: 99%

“…To obtain high back-off efficiency in a Doherty PA, the gate bias of the peaking amplifier is usually configured according to the back-off resistance value. While the back-off level is defined by (17), when the back-off matching resistance is higher than 2R opt , high efficiency can be obtained over larger than 6 dB output power range if the gate bias is properly configured based on the resistance value 3.045R opt in Mode II [23], [24]. However, this may lead to a narrow operation bandwidth because the back-off resistance value decreases at other frequencies in Mode II.…”

Section: Back-off Efficiency Performancementioning

confidence: 99%

“…The over-driven level of the proposed DPA at back-off can be defined as BO p − BO γ . From (14), (16) and (17), the over-driven level can be easily calculated. By employing the over-driven current waveform introduced in [25], [26], we can obtain the back-off efficiency performance of the proposed DPA.…”

Section: Back-off Efficiency Performancementioning

confidence: 99%

“…The bandwidth expansion of DPAs at architecture level has also been explored, such as dual input [2], [3] or bias adaptation [15]. Other techniques for improving average efficiency such as load modulated balanced PAs [16] and Doherty-like multi-transistors combing PAs [17] also extend the bandwidth to higher than 3 GHz to meet the requirements for the 5G systems. Nevertheless, the bandwidths of DPAs are still limited and it is very challenging to design a high efficiency Doherty PA to cover the full bandwidth of 5G, e.g., from 2 to 5 or 6 GHz.…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Ultra-Wideband Dual-Mode Doherty Power Amplifier Using Reciprocal Gate Bias for 5G Applications

Pang

et al. 2019

IEEE Trans. Microwave Theory Techn.

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A novel architecture to extend the bandwidth of the Doherty power amplifier (DPA) is presented in this paper. It is illustrated that two DPA modes at different frequency bands can be realized by simply swapping the gate biases of the transistors without changing the matching circuits, and hence ultra wide bandwidth can be achieved by using a single load modulation network in DPA. A dual-mode DPA with 2.8-4.1 GHz bandwidth for Mode I and 2.2-2.7/4.2-4.8 GHz bandwidth for Mode II using commercial GaN transistors is designed and implemented to validate the proposed architecture. The fabricated DPA attains a measured 7.5-11.7 dB gain and 39.2-41 dBm saturated power. 35.0% to 49.7% drain efficiency is obtained at 6 dB output power back-off for the designed dual-mode bands. When driven by a 10-carrier 200 MHz OFDM signal with 7.7 dB peak to average power ratio, the proposed DPA achieves adjacent channel leakage ratio of better than-50 dBc after digital predistortion at 2.5/3.5/4.5 GHz with average efficiency of 46.0/35.7/33.0%. This simple configuration provides a promising solution for 5G, where multiple frequency bands in sub-6 GHz will be deployed.

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Section: B Bandwidth Analysismentioning

confidence: 99%

Section: Back-off Efficiency Performancementioning

confidence: 99%

Section: Back-off Efficiency Performancementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Ultra-Wideband Dual-Mode Doherty Power Amplifier Using Reciprocal Gate Bias for 5G Applications

Pang

et al. 2019

IEEE Trans. Microwave Theory Techn.

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“…By introducing techniques such as continuous mode impedance [13]- [15], post-matching architecture [16]- [19], integrated compensating reactance [20], [21] and complex combing loads [22]- [24], bandwidth of DPAs has been greatly extended. However, when the required operation bands are separated by more than one octave, it is still difficult to cover them with Doherty operation [25], [26]. Possible solutions are to employ dual/multi-band or reconfigurable structures which could not cover the whole frequency band.…”

Section: Introductionmentioning

confidence: 99%

Multiband Dual-Mode Doherty Power Amplifier Employing Phase Periodic Matching Network and Reciprocal Gate Bias for 5G Applications

Pang

Dai

et al. 2020

IEEE Trans. Microwave Theory Techn.

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This paper presents a novel method to design the multi-band Doherty power amplifier (DPA). It is illustrated that phase periodic matching networks (PPMNs) can be used as multi-band impedance inverters, offset elements and phase compensators to realize multi-band DPAs. Moreover, the number of Doherty operation bands can be further increased by employing the reciprocal gate biases. A 6-band dual-mode DPA with 1.8-2.2/3.9-4.3 GHz operation bands in Mode I and 1.52-1.72/2.38-2.53/3.67-3.82/4.53-4.68 GHz operation bands in Mode II using commercial GaN transistors is designed and implemented to validate the proposed method. The fabricated DPA achieves 8.7-13.5 dB gain and 39.6-41.5 dBm peak output power at all the designed bands. Drain efficiency of 49.2%-54.5% and 42.2%-56.7% is measured at 6 dB output back-off in Mode I and Mode II, respectively. When stimulated by a 5-carrier 100 MHz OFDM signal with 7.7 dB peak to average power ratio (PAPR), adjacent channel power ratio (ACPR) of better than-48.9 dBc can be obtained by the proposed DPA after digital predistortion with 35.5%-50.1% average drain efficiency at 1.65/1.95/2.45/3.75/4.1/4.6 GHz, respectively.

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A design of 1 to 4 GHz broadband high‐efficiency power amplifier with two‐way concurrent active load modulation method

You

Peng

et al. 2021

Int J RF Microw Comput Aided Eng

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Active load modulation and harmonic injection can be used to boost the power amplifier's (PA) efficiency, but these techniques must add a fundamental external source or a harmonic generator. In this paper, a two-way power amplifier architecture is introduced to extend high-efficiency operation bandwidth by utilizing concurrent active load modulation with a waveform mapping method. Active load modulation is realized in between the two branches with the aid of independent input amplitude and phase control. Based on a calculated waveform database, high-efficiency operations for both transistors from 1 to 4 GHz are designed in a self-defined optimization platform considering waveform distance and input parameters. Finally, this PA is fabricated and measured to offer 41.6 to 45.0 dBm power, 8.2 to 11.7 dB gain, and 56% to 89% drain efficiency from 0.85 to 3.85 GHz.

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A 1.8-3.8-GHz Power Amplifier With 40% Efficiency at 8-dB Power Back-Off

Cited by 53 publications

References 40 publications

Ultra-Wideband Dual-Mode Doherty Power Amplifier Using Reciprocal Gate Bias for 5G Applications

Ultra-Wideband Dual-Mode Doherty Power Amplifier Using Reciprocal Gate Bias for 5G Applications

Multiband Dual-Mode Doherty Power Amplifier Employing Phase Periodic Matching Network and Reciprocal Gate Bias for 5G Applications

A design of 1 to 4 GHz broadband high‐efficiency power amplifier with two‐way concurrent active load modulation method

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