A 1-nS 1-V Sub-1-µW Linear CMOS OTA with Rail-to-Rail Input for Hz-Band Sensory Interfaces

Abstract

The paper presents an operational transconductance amplifier (OTA) with low transconductance (0.62–6.28 nS) and low power consumption (28–270 nW) for the low-frequency analog front-ends in biomedical sensor interfaces. The proposed OTA implements an innovative, highly linear voltage-to-current converter based on the channel-length-modulation effect, which can be rail-to-rail driven. At 1-V supply and 1-Vpp asymmetrical input driving, the linearity error in the current-voltage characteristics is 1.5%, while the total harmonic distortion (THD) of the output current is 0.8%. For a symmetrical 2-Vpp input drive, the linearity error is 0.3%, whereas THD reaches 0.2%. The linearity is robust for the mismatch and the process-voltage-and-temperature (PVT) variations. The temperature drift of transconductance is 10 pS/°C. The prototype circuit was fabricated in 180-nanometer CMOS technology.

A gm/ID-Based Design Strategy for IoT and Ultra-Low-Power OTAs with Fast-Settling and Large Capacitive Loads

“…These values are inserted in the MATLAB script in the Appendix A. The input noise spectral density is specified as 200 nV/ √ Hz, however, in the design, it will not play any role as it leads to a minimum transconductance smaller than that set by (30).…”

“…If noise specification is given, a minimum value for G m1 is established from (24). If this minimum value is higher than that obtained from (30), the procedure shall use the transconductance value sets by the noise specification. This can be accomplished by simply evaluating the maximum between (30) and (24) in the computation of G m1 in the third step of the procedure.…”

“…For its characteristics, it suits the sensing section, where high precision and moderate bandwidth are required. Due to the reduction in the power supply voltage, multistage topologies are often adopted in these amplifiers, and the optimization of the power consumption must face with noise, dynamic range and speed trade-offs [24][25][26][27][28][29][30][31][32][33][34][35][36]. Ultra-low-power amplifiers cut down the power consumption by biasing all the transistors in the sub-threshold region; however, the speed requirements are more arduous to fulfill also because the slew-rate effects produce serious limitations.…”

Ladder-Based Synthesis and Design of Low-Frequency Buffer-Based CMOS Filters

“…[11,12,14] have been linearized by a source degeneration reducing the transconductance to the range of single nano siemens. However, linearization techniques also increase the complexity and noise of the circuit [13,21]. In consequence, the OTA-C filters [11,12,14] are characterized by a high noise of over 190 µV RMS .…”

“…Synthesis of a second-order response is also possible, however, only for certain classes of buffers-for instance a few variants of source followers including undamped [1,2], super [3], flipped [4][5][6], and ones that belong to other classes [7][8][9][10]. The advantage of the buffer-based filter realizations is a substantially lower number of transistors compared to traditional Operational Transconductance Amplifier Capacitor (OTA-C) structures [11][12][13][14] since a single transistor or a differential pair replaces the entire OTA. Consequently, the buffer-based filters are referred to as "transistorized" filters [6,15].…”