A 10-bit DC-20-GHz Multiple-Return-to-Zero DAC With &gt;48-dB SFDR

Duncan, Lucas; Dupaix, Brian; McCue, Jamin J.; Mathieu, Brandon; LaRue, Matthew; Patel, Vaama; Teshome, Mesfin; Choe, Minhyeok; Khalil, Waleed

doi:10.1109/jssc.2017.2749441

Cited by 25 publications

(6 citation statements)

References 43 publications

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“…To reduce the power consumption, a multiple-return-to-zero (MRZ) DAC [ Fig. 3(b)] exploiting higher Nyquist zones is capable of synthesizing frequencies up to 20 GHz [24]. However, limited flexibility in choosing the output frequency band (centered around N • f s ) and an output spectrum corrupted by DAC replicas does not make this a good candidate.…”

Section: A Analog/rf Sectionmentioning

confidence: 99%

Designing a DDS-Based SoC for High-Fidelity Multi-Qubit Control

Dijk

Patra

Pellerano

et al. 2020

IEEE Trans. Circuits Syst. I

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The design of a large-scale quantum computer requires co-optimization of both the quantum bits (qubits) and their control electronics. This work presents the first systematic design of such a controller to simultaneously and accurately manipulate the states of multiple spin qubits or transmons. By employing both analytical and simulation techniques, the detailed electrical specifications of the controller have been derived for a single-qubit gate fidelity of 99.99% and validated using a qubit Hamiltonian simulator. Trade-offs between several architectures with different levels of digitization are discussed, resulting in the selection of a highly digital DDS-based solution. Initiating from the system specifications, a complete error budget for the various analog and digital circuit blocks is drafted and their detailed electrical specifications, such as signal power, linearity, spurs and noise, are derived to obtain a digital-intensive power-optimized multi-qubit controller. A power consumption estimate demonstrates the feasibility of such a system in a nanometer CMOS technology node. Finally, application examples, including qubit calibration and multiqubit excitation, are simulated with the proposed controller to demonstrate its efficacy. The proposed methodology, and more specifically, the proposed error budget lay the foundations for the design of a scalable electronic controller enabling large-scale quantum computers with practical applications.

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Section: A Analog/rf Sectionmentioning

confidence: 99%

Designing a DDS-Based SoC for High-Fidelity Multi-Qubit Control

Dijk

Patra

Pellerano

et al. 2020

IEEE Trans. Circuits Syst. I

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“…Such a system requires only a single LO, setting the desired output frequency band, while supporting multiple qubits at different frequencies in the 2-GHz output band, due to the direct digital synthesizer containing numerically controlled oscillators (NCOs) to keep track of the phase of each qubit. To realize a highly linear RF transmitters with low output power, operating up to 20 GHz, multiple-return-to-zero (MRZ) DAC topologies are typically preferred over a standard RF DAC architecture [30]. However, in comparison, a generic SSB architecture offers the widest data bandwidth, as required to control many qubits, and more flexibility in the choice of the output frequency band independently of the data bandwidth so as to efficiently address different qubit types.…”

Section: System Architecture and Specificationsmentioning

confidence: 99%

A Scalable Cryo-CMOS Controller for the Wideband Frequency-Multiplexed Control of Spin Qubits and Transmons

Dijk

Patra

Subramanian

et al. 2020

IEEE J. Solid-State Circuits

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Building a large-scale quantum computer requires the co-optimization of both the quantum bits (qubits) and their control electronics. By operating the CMOS control circuits at cryogenic temperatures (cryo-CMOS), and hence in close proximity to the cryogenic solid-state qubits, a compact quantumcomputing system can be achieved, thus promising scalability to the large number of qubits required in a practical application. This work presents a cryo-CMOS microwave signal generator for frequency-multiplexed control of 4 × 32 qubits (32 qubits per RF output). A digitally intensive architecture offering full programmability of phase, amplitude, and frequency

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“…In the design of switching current source cell, it is crucial to reduce the signal-dependence of switch behavior [37] . A few techniques are proposed including the quad-switch structure [34,50] and the RZ current switches [51,52] .…”

Section: Fom1 Fom2 Fom3mentioning

confidence: 99%

A survey of high-speed high-resolution current steering DACs

Li¹,

Zhou²

2020

J. Semicond.

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Digital to analog converters (DAC) play an important role as a bridge connecting the analog world and the digital world. With the rapid development of wireless communication, wideband digital radar, and other emerging technologies, better performing high-speed high-resolution DACs are required. In those applications, signal bandwidth and high-frequency linearity often limited by data converters are the bottleneck of the system. This article reviews the state-of-the-art technologies of high-speed and high-resolution DACs reported in recent years. Comparisons are made between different architectures, circuit implementations and calibration techniques along with the figure of merit (FoM) results.

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A 10-bit DC-20-GHz Multiple-Return-to-Zero DAC With >48-dB SFDR

Cited by 25 publications

References 43 publications

Designing a DDS-Based SoC for High-Fidelity Multi-Qubit Control

Designing a DDS-Based SoC for High-Fidelity Multi-Qubit Control

A Scalable Cryo-CMOS Controller for the Wideband Frequency-Multiplexed Control of Spin Qubits and Transmons

A survey of high-speed high-resolution current steering DACs

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