A 10-bit Resistor-Floating-Resistor-String DAC (RFR-DAC) for High Color-Depth LCD Driver ICs

Lu, Chih-Wen; Yin, Peng; Hsiao, Ching-Min; Chang, Mau-Chung Frank; Lin, Yo‐Sheng

doi:10.1109/jssc.2012.2206684

Cited by 56 publications

(22 citation statements)

References 25 publications

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“…Plus, due to the fabrication spread and scale alternative of the panels, the buffer amplifiers should master a wide range of capacitive load ( ) up to tens of nF, while securing adequately large DC gain (e.g., dB for 10 bit resolution [2]) and output swing. Currently, multi-stage amplifiers dominate those applications owing to their key advantages of high DC gain and rail-to-rail output swing.…”

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confidence: 99%

Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier With Enhancements of DC Gain, GBW and Slew Rate

Zhang

Mak

Law

et al. 2015

IEEE J. Solid-State Circuits

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For better area and power efficiencies, rail-to-railoutput single-stage amplifiers are a potential replacement of their multi-stage counterparts, especially for display applications that entail massive buffer amplifiers in their column drivers. This paper describes a nested-current-mirror (NCM) technique for a single-stage amplifier to achieve substantial enhancements of DC gain, gain-bandwidth product (GBW) and slew rate (SR). Specifically, NCM is customizable for different mirror steps, and sub mirror ratios, to balance the performance metrics and capacitive-load ( ) drivability, avoiding any compensation passives while preserving a rail-to-rail output swing. Analytical treatments of the NCM technique in terms of performance limits and robustness reveal that the NCM amplifier can surpass the fundamental power-efficiency limit set by the basic differential-pair (DP) amplifier. Two prototypes, 3-step and 4-step NCM amplifiers, were fabricated in 0.18 m CMOS for systematic comparison with the DP amplifier. The former represents a robust design exhibiting 72 dB DC gain and 0.0028-0.27 MHz GBW over 0.15-15 nF with 80 phase margin (PM). The latter embodies an aggressive design attaining 84 dB DC gain and 0.013-1.24 MHz GBW over 0.15-15 nF with 62 PM. All amplifiers were sized for the same area (0.0013 mm ) and power (3.6 W).Index Terms-Area efficiency, CMOS, current mirror, DC gain, differential-pair (DP) amplifier, frequency compensation, gain-bandwidth product (GBW), low temperature polysilicon LCD, multi-stage amplifier, nested current mirror, rail-to-rail output swing, single-stage amplifier, slew rate (SR), stability.

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confidence: 99%

Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier With Enhancements of DC Gain, GBW and Slew Rate

Zhang

Mak

Law

et al. 2015

IEEE J. Solid-State Circuits

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“…The fabricated NCM amplifier demonstrates 33× higher GBW and 47dB higher DC gain than those of a typical differential-pair (DP) amplifier at equal power and area. By benchmarking with the recent three-stage amplifiers [2]- [4], this work improves FOM 1 [=GBW•C L /(Power•Area)] by >6.6×, and upholds a comparable FOM 2 [=SR•C L /(Power•Area)]. The C L drivability is >10× wider than [2]- [4], while avoiding the stability limit at the heavy-C L side.…”

mentioning

confidence: 92%

“…For active-matrix LCDs [1] that have thousands of buffer amplifiers integrated in its column-driver ICs, ultra-low power and area circuit solutions are continuously urged to meet the market pressure on cost, image quality and display size. Multi-stage amplifiers have dominated those buffers due to their reliable DC gain, output swing, gain-bandwidth product (GBW) and slew rate (SR).…”

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confidence: 99%

17.2 A 0.0013mm<sup>2</sup> 3.6μW nested-current-mirror single-stage amplifier driving 0.15-to-15nF capacitive loads with >62° phase margin

Zhang

Mak

Law

et al. 2014

2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC)

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For active-matrix LCDs [1] that have thousands of buffer amplifiers integrated in its column-driver ICs, ultra-low power and area circuit solutions are continuously urged to meet the market pressure on cost, image quality and display size. Multi-stage amplifiers have dominated those buffers due to their reliable DC gain, output swing, gain-bandwidth product (GBW) and slew rate (SR). Yet, different kinds of frequency compensation are also useful for stability, bottlenecking the capacitive-load (C L ) drivability, power and area efficiencies.Classical single-stage amplifiers were underused in those buffers due to their limited capability in most metrics despite being almost unconditionally stable at any C L and tiny in size. In view of this, it is beneficial to revisit the fundamental limits of single-stage amplifiers and deal with them differently. This paper introduces a nested-current-mirror (NCM) single-stage amplifier to advance its GBW-to-power/area efficiency and C L drivability beyond the multi-stage designs, while preserving a rail-to-rail output swing. The fabricated NCM amplifier demonstrates 33× higher GBW and 47dB higher DC gain than those of a typical differential-pair (DP) amplifier at equal power and area. By benchmarking with the recent three-stage amplifiers [2]-[4], this work improves FOM 1 [=GBW•C L /(Power•Area)] by >6.6×, and upholds a comparable FOM 2 [=SR•C L /(Power•Area)]. The C L drivability is >10× wider than [2]-[4], while avoiding the stability limit at the heavy-C L side. These results justify advanced single-stage amplifiers as a potential replacement for multi-stage designs in traditional (e.g. 100pF/m coaxial cable) and advanced (e.g. low temperature polysilicon LCD) buffer interfaces.Most single-stage amplifiers suffer from a tight tradeoff between power and performance. Telescopic amplifiers feature a GBW-to-power efficiency as high as that of the DP amplifier ( Fig. 17.2.1), but sacrifice output swing. Foldedcascode amplifiers partially surmount such a limit, but at the expense of power. For LCD column drivers, current-mirror amplifiers are favored for their rail-torail output swing, and extra design flexibility via adjusting the mirror ratio, K. A large K benefits most metrics (i.e., effective transconductance (G m,eff ), GBW and SR), but at the expense of noise and phase margin (PM). Yet, no matter how large K is, most metrics of the current-mirror amplifier still lag behind those of the DP amplifier.The basic principle of the NCM amplifier ( Fig. 17.2.1) is to subdivide a current mirror into a number of pieces with different ratios, and sequentially combine their outputs to concurrently advance G m,eff and output resistance (R out ) beyond those of the DP and current-mirror amplifiers. Specifically, by sharing the current I b2 (for the left-half side) with N divided differential-input transistors [(I 1 , M 1 ),(I 2 , M 2 )…(I N , M N )], their outputs can be combined via N nested current mirrors with ratios [(1:K 1 ),(1:K 2 )…(1:K N )]. Since M 1 -M N are located in the signa...

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“…Therefore, its performance is highly relay on the design of its digital to analogous converter (DAC). There are many types of DAC structures that have been proposed in the literature [5][6][7][8][9][10][11][12]. Resistor based DAC architecture is one of the most attractive due to its simplicity structure, high stability, high monotonic, and low power consumption [12] and is a good choice for space application.…”

Section: Introductionmentioning

confidence: 99%

A New Digital to Analog Converter Based on Low-Offset Bandgap Reference

Qiu

Liu

Chen

et al. 2017

Journal of Electrical and Computer Engineering

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This paper presents a new 12-bit digital to analog converter (DAC) circuit based on a low-offset bandgap reference (BGR) circuit with two cascade transistor structure and two self-contained feedback low-offset operational amplifiers to reduce the effects of offset operational amplifier voltage effect on the reference voltage, PMOS current-mirror mismatch, and its channel modulation. A Start-Up circuit with self-bias current architecture and multipoint voltage monitoring is employed to keep the BGR circuit working properly. Finally, a dual-resistor ladder DAC-Core circuit is used to generate an accuracy DAC output signal to the buffer operational amplifier. The proposed circuit was fabricated in CSMC 0.5 μm 5 V 1P4M process. The measured differential nonlinearity (DNL) of the output voltages is less than 0.45 LSB and integral nonlinearity (INL) less than 1.5 LSB at room temperature, consuming only 3.5 mW from a 5 V supply voltage. The DNL and INL at −55°C and 125°C are presented as well together with the discussion of possibility of improving the DNL and INL accuracy in future design.

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A 10-bit Resistor-Floating-Resistor-String DAC (RFR-DAC) for High Color-Depth LCD Driver ICs

Cited by 56 publications

References 25 publications

Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier With Enhancements of DC Gain, GBW and Slew Rate

Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier With Enhancements of DC Gain, GBW and Slew Rate

17.2 A 0.0013mm<sup>2</sup> 3.6μW nested-current-mirror single-stage amplifier driving 0.15-to-15nF capacitive loads with >62° phase margin

A New Digital to Analog Converter Based on Low-Offset Bandgap Reference

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A 10-bit Resistor-Floating-Resistor-String DAC (RFR-DAC) for High Color-Depth LCD Driver ICs

Cited by 56 publications

References 25 publications

Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier With Enhancements of DC Gain, GBW and Slew Rate

Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier With Enhancements of DC Gain, GBW and Slew Rate

17.2 A 0.0013mm<sup>2</sup> 3.6&#x03BC;W nested-current-mirror single-stage amplifier driving 0.15-to-15nF capacitive loads with &#x003E;62&#x00B0; phase margin

A New Digital to Analog Converter Based on Low-Offset Bandgap Reference

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17.2 A 0.0013mm<sup>2</sup> 3.6μW nested-current-mirror single-stage amplifier driving 0.15-to-15nF capacitive loads with >62° phase margin