A 10-Level Flying Capacitor Multi-Level Dual-Interleaved Power Module for Scalable and Power-Dense Electric Drives

Pallo, Nathan; Coday, Samantha; Schaadt, Joseph; Assem, Pourya; Pilawa-Podgurski, Robert C. N.

doi:10.1109/apec39645.2020.9124531

Cited by 37 publications

(24 citation statements)

References 36 publications

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“…Pallo et al 43 implemented a power dense 10‐level dual‐interleaved FC MLI for EV applications. It is an extended version of the topology proposed in Pallo et al 36 This topology yielded high working efficiency of 98.6%, high power density of 26.7 kW/kg, and low output current distortion.…”

Section: Reduced Switch Mlismentioning

confidence: 99%

“…Table 34 presents a detailed comparative analysis based on the number of output voltage levels ( N level ) and component count, namely, number of switches ( N sw ), number of diodes ( N diode ), number of capacitors ( N cap ), number of gate drivers ( N gd ), number of DC voltage sources ( N dc ), number of inductors ( N ind ), and total component count (TCC). It is observed that the single‐phase inverter topologies proposed by Modeer et al, 49 Pallo et al, 36,43 Lei et al, 33 and Pereda and Dixon 29 require a very large switch count relative to other reduced‐switch MLI topologies, when they are used for three‐phase EV motor drive applications.…”

Section: Comparartive Analysismentioning

confidence: 99%

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Review of reduced‐switch multilevel inverters for electric vehicle applications

Aishwarya

Sheela

2021

Circuit Theory & Apps

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This paper deals with the detailed review and comparative analysis of latest reduced switch multilevel inverter topologies for electric vehicle applications. The recent trends in reduced‐switch multilevel inverters are discussed. Detailed review of the reduced‐switch multilevel inverter topologies, their merits and demerits, and the comparative analysis based on component count, total harmonic distortion, and efficiency are conducted. This paper gives a detailed review of recent trends in reduced‐switch multilevel inverter topologies for electric vehicle applications. Switching pattern of the topologies is provided for better understanding of the inverter operation. Comparative analysis of the reduced‐switch inverter topologies based on the component count, total harmonic distortion of output voltage, and efficiency is also presented in this paper. Based on the comparative analysis, it is observed that the interleaved nine‐level flying capacitor multilevel inverter topology achieved the lowest output voltage distortion of 1.6%, which is within the acceptable limits of IEEE 519‐2014 standard. It is observed that the three‐level active neutral point clamped multilevel inverter topology achieved the highest working efficiency of 99.4%. This paper discusses the most recent trends in reduced‐switch multilevel inverters. A comprehensive review of the recent publications and a crisp comparative analysis of the different inverter configurations based on component count, harmonic distortion of output voltage, and efficiency are presented in this paper.

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Section: Reduced Switch Mlismentioning

confidence: 99%

Section: Comparartive Analysismentioning

confidence: 99%

Review of reduced‐switch multilevel inverters for electric vehicle applications

Aishwarya

Sheela

2021

Circuit Theory & Apps

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“…The presented point-wise prediction of the switch voltages presented in (42) is compared to the developed model where the inductor current is assumed linear as in (28). In Fig.…”

Section: Switch Voltage During Short-circuit Conditionmentioning

confidence: 99%

“…11. The FCML is a 10-level design with two interleaved phases for switching harmonic cancellation [28]. At its nominal design operated at 10 levels, the effective inductor current ripple frequency is above 1 MHz with a power rating of 15 kVA.…”

Section: Experimental Verificationmentioning

confidence: 99%

Theoretical Analysis and Experimental Validation of Flying-Capacitor Multilevel Converters Under Short-Circuit Fault Conditions

Taul

Pallo

Stillwell

et al. 2021

IEEE Trans. Power Electron.

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Addressing the increasing demand for highefficiency and high-power-density converters, the flying-capacitor multilevel converter has shown itself as a promising topology. A key advantage of this topology is the reduced voltage rating of the switches, which also makes it vulnerable to device failure during short-circuit conditions. Despite a large interest in fault-tolerant operation of these converters alongside detailed descriptions of flying capacitor balancing during different conditions, little research has focused on the converter short-circuit fault analysis, which may cause a switch failure if not properly designed for. To address this vulnerability, this work presents a comprehensive model describing the large-signal short-circuit switching behavior of a general N -level flying-capacitor multilevel converter. Based on this, highly simplified models used to predict the evolution of the switch current and voltage stress during the fault are proposed, targeted at practicing engineers for conservative design guidelines. These models are used to determine the time for remedial action of the converter before reaching some predefined maximum tolerable conditions. A 2-to-10-level fully-configurable flying-capacitor multilevel converter and a fault circuit hardware prototype are used to experimentally perform different shortcircuit tests, which shows a good match between the predicted and measured behavior.

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“…Yet because the available power is halved on the output side, it cannot be applied in high-voltage applications. In [11], FC-MLI shows many benefits. For example, a lower number of devices, and energy can be created by the power-dense capacitors for obtaining ripple-free voltage and the multiplying effect [11].…”

Section: Introductionmentioning

confidence: 99%

Comprehensive Study on Reduced DC Source Count: Multilevel Inverters and Its Design Topologies

et al. 2022

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Due to cutting-edge innovations in industry and academia, research is more centered around multilevel inverters (MLIs), which play a significant role in different high/medium voltage and high-power applications when contrasted with traditional inverters. Relative analysis of the reduced DC source count and switch inverter topologies highlight its significant benefits, which include control complexity, switch count, source count, reliability, efficiency, cost, voltage stress, total harmonic distortion (THD), and power quality. When switched-capacitor technology is deployed, it is seen that with the assistance of 14 switches, a 53 level result is accomplished, and the THD is just around 1.41%, which is kept up with as per the IEEE 519-2014 norms. Whenever cascaded MLI topology is employed, the inversion efficiency is more prominent, and is about 99.06%. Hence, this review focuses on a few of the late-evolved MLIs utilized, and the benefits and drawbacks for different topologies are examined. To assist with current modern research in this field and the decision of the proper inverter for various applications, a novel topology of an MLI can be planned later on. Different setups of MLIs have been exhaustively covered and reviewed.

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A 10-Level Flying Capacitor Multi-Level Dual-Interleaved Power Module for Scalable and Power-Dense Electric Drives

Cited by 37 publications

References 36 publications

Review of reduced‐switch multilevel inverters for electric vehicle applications

Review of reduced‐switch multilevel inverters for electric vehicle applications

Theoretical Analysis and Experimental Validation of Flying-Capacitor Multilevel Converters Under Short-Circuit Fault Conditions

Comprehensive Study on Reduced DC Source Count: Multilevel Inverters and Its Design Topologies

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