A 11.4dBm 90nm CMOS H-Bridge resonating polar amplifier using RF Sigma Delta Modulation

Rong, Liang; Jönsson, Fredrik; Zheng, Lirong

doi:10.1109/esscirc.2011.6044968

Cited by 3 publications

(2 citation statements)

References 15 publications

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“…This architecture requires two PAs, one for positive pulses and one for negative pulses, with a combiner after the PAs [9]- [10]. The H-bridge configuration with a transformer as a combiner [7], [10] is a representative configuration for this method. However, in this configuration the chip area and power loss are large owing to the existence of a transformer [13] which must be connected with a single-ended device such as a microstrip antenna.…”

Section: Introductionmentioning

confidence: 99%

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Optimization of DSM Sampling Frequency and Interleaving Frequency for Bilevel Quadrature-Modulation EPWM Transmitter

Noda

Umeda

Kozawa

2016

Journal of Signal Processing

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We previously proposed a bilevel quadrature-modulation (QM) envelope-pulse-width-modulation (EPWM) transmitter using half a side of a trilevel EPWM architecture. However, the optimum relationship between the  modulation (DSM) sampling frequency (f s ), the interleaving frequency (f i ) and the carrier frequency (f c ) for a bilevel QM EPWM transmitter has not been investigated. This paper presents this optimum relationship, with the error vector magnitude (EVM) and the coding efficiency (CE) as figures of merit (FOMs).

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Section: Introductionmentioning

confidence: 99%

“…In addition, the QM architecture is suitable for integration in a digital LSI because it does not include a complex phase modulator. Moreover, in principle it has superior quantum noise performance to a polarmodulation EPWM architecture [1], [3], [7], [9] which has nonlinearity in conversion from quadrature to polar coordinates [5].…”

Section: Introductionmentioning

confidence: 99%

Optimization of DSM Sampling Frequency and Interleaving Frequency for Bilevel Quadrature-Modulation EPWM Transmitter

Noda

Umeda

Kozawa

2016

Journal of Signal Processing

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A wireless portable SOS device based on all-digital-phase-locked-loop

Zhang

Cui

Zou

et al. 2015

2015 IEEE International Conference on Consumer Electronics - Taiwan

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In this paper, we present a portable SOS device with wireless communication. This device is based on all-digitalphase-locked-loop (ADPLL). A wake-up mode is implemented for low power consumption. With extra biological sensors attached to the users, the device is awakened by abnormal signals and actively sends a SOS signal for help. Moreover, it can use those sensors to collect information from users. This information can be modulated to RF frequency and sent out along with the SOS signal. The SOS device also can be used in passive mode with a SOS button in some emergency situations.

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Quadrature-modulation envelope-pulse-width-modulation transmission system using quadrature polarized waves

Sakai

Mgrita

Umeda

et al. 2017

2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)

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A 11.4dBm 90nm CMOS H-Bridge resonating polar amplifier using RF Sigma Delta Modulation

Cited by 3 publications

References 15 publications

Optimization of DSM Sampling Frequency and Interleaving Frequency for Bilevel Quadrature-Modulation EPWM Transmitter

Optimization of DSM Sampling Frequency and Interleaving Frequency for Bilevel Quadrature-Modulation EPWM Transmitter

A wireless portable SOS device based on all-digital-phase-locked-loop

Quadrature-modulation envelope-pulse-width-modulation transmission system using quadrature polarized waves

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