A 14b 200MS/s DAC with SFDR>78dBc, IM3<−83dBc and NSD<−163dBm/Hz across the whole Nyquist band enabled by dynamic-mismatch mapping

Abstract

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A 5mW 250MS/s 12-bit synthesized digital to analog converter

“…Current-steering DAC architectures are the most widely used because of their speed [8]- [12]. We employ a current-steering architecture that uses many current cells that are designed on a standard cell grid so they may be automatically laid out with digital cells.…”

A 12-Bit 1GS/s Current-Steering DAC with Matching Capacitor in Switched Current Cell

“…The rapid development of communication technology drives the requirement of high-speed and high-resolution DAC. For RF applications, a DAC acts as an interface between digital baseband and RF front-end, and dynamic performance of the DAC, such as SFDR is more important and concerned than its static performance [1]. The dynamic performance is affected by many factors.…”

Timing error measurement for highly linear wideband Digital to Analog Converters

“…However, it only measures the actual delay error, and does not take the non-identical transition waveforms into account. In [5], a measurement method is shown, which is based on analyzing the harmonics in the current cell response to a test signal. The analysis is done in the frequency domain.…”