A 14b 750MS/s DAC in 20nm CMOS with <-168dBm/Hz noise floor beyond Nyquist and 79dBc SFDR utilizing a low glitch-noise hybrid R-2R architecture

A Wideband 6th Order Programmable Bandpass DEM Implementation for a Nyquist DAC

“…The above-mentioned techniques are not as effective in mitigating the DAC errors at high frequencies, therefore, the DAC's SFDR and IMD performance degrades significantly above Fs/4. The worst SFDR and IMD reported in [2][3][4][5][6][7][8][9] over the Nyquist-band is 78dB and 82dB respectively. Noise-shaping ∑∆ DACs [10] are an attractive choice for numerous applications due to their ability to tolerate high levels of static mismatch error.…”

“…Several solutions have been proposed for Nyquist DACs to mitigate the impact of static errors and to improve the dynamic performance over the Nyquist band. The foreground or background techniques in [2][3][4][5] involve complex static calibrations using analog and digital circuitry. Dynamic element matching (DEM) using randomization methods [6,7] translates the distortion tones into white noise resulting in a flat spectrum across the entire band leading to in-band SNDR degradation.…”

“…The DEM design logic is implemented using a vectorfeedback DEM (VF-DEM) structure [11] onto a XILINX high-speed FPGA part. The proposed solution is fully-digital, configurable, and shows better SFDR, IMD performance as compared to existing static error alleviating techniques [2][3][4][5][6][7][8][9] over the Nyquist band.…”