A noise-shaped direct digital IF to RF (DIF2RF) DAC with embedded upconverter mixer is presented. The digital IF signal is noise shaped by a bandpass 6-1 modulator with 1-bit IF output followed by a semidigital finite impulse response (FIR) filter. The current mode FIR filter combines scaled values of the local oscillator (LO) signal for performing reconstruction filtering and upconversion in a single module. The DIF2RF design modulates the digital IF signal with a digital LO signal. This topology eliminates the transconductance nonlinearity of conventional mixers and is inherently linear due to single-bit digital IF input. The presented architecture reduces clock jitter sensitivity of 1-bit DACs by masking IF clock transitions with LO signals. A prototype of the DIF2RF DAC is designed and fabricated in a five-layer metal 0.25-m digital CMOS process. The architecture can be used in low-power software-defined digital-IF transmitters. The DIF2RF DAC consumes 49 mA from a 2.5-V supply, achieving 64.7-dBc third-order intermodulation at 1.03 GHz with a spurious-free dynamic range of 72 dB in a 15-MHz bandwidth.

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A new low-power RF receiver architecture that facilitates use of on-chip high-Q Nano-Electro-Mechanical (NEM) resonators for channel selection at RF is presented. Integration of high-Q RF filters in future low-power receivers is inevitable. In this paper the idea of using high-Q filters is investigated with two approaches. One is determining the requirements of high-Q filters in a narrow-band RF receiver. Two is studying the effect of these filters on the receiver in terms of reducing the power consumption of the blocks such as LNA, Mixer and VCO. The nonlinearity and power consumption of low-IF receiver with and without RF NEMS filters is analyzed. The target application is for the GSM900 MHz, and the high-Q NEMS filters are used as the front-end channel selectivity filters with Q~3000 at 900 MHZ for selecting channels with bandwidth of 200 KHz. This will attenuate interferes and blockers entering the desired signal channel in the receiver resulting in lowering the required dynamic range, linearity, IIP2 and IIP3, and therefore the power consumption of the receiver. The objective of this paper is to create a link between the research on high-Q RF filters and the research on the low-power RF circuit design. The discussion provides a measure about benefits of employing high-Q NEMS filters at RF.

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In many wireless systems, the transmit (TX) signal could leak to the receiver input through the antenna duplexer, and this leakage could raise the noise level in the receive (RX) band. Therefore, it is important to be able to accurately predict the noise spectrum that leaks into the RX band from a TX digital-to-analog converter (DAC) in order to optimize the noise performance. This study analyzes the DAC output noise that is caused by the phase noise of the DAC clock. First, a closed-form equation is derived to account for both the phase noise and noise aliasing. Then, the proposed TX leakage prediction in the RX band is verified with both simulation and measurement. A clear understanding of the relationship between the clock phase noise and the DAC output noise spectrum could enable both the DAC and phase-locked loop designs to be optimized for the lowest RX band noise performance with low cost and power consumption at the same time.Index Terms-Digital-to-analog converter (DAC), long-term evolution (LTE), noise, phase noise, receive (RX) band, receiver, surface acoustic wave (SAW) filter, transmitter, wideband codedivision multiple access.