A 150 MIPS/W CMOS RISC processor for PDA applications

Nagamatsu, M.; Tago, H.; Mijamori, T.; Kamata, Makoto; Murakami, Hiroaki; Ootaguro, Y.; Goto, H.; Utsumi, Teruo; Teruyama, T.; Mabuchi, K.; Kawasumi, A.; Malik, Kamil

doi:10.1109/isscc.1995.535454

Cited by 6 publications

(3 citation statements)

References 1 publication

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Measure performance in MIPS/W are 320 MIPS/W at 33 MHz, and 480 MIPS/W at 20 MHz, which are improved by a factor of more than two compared with that of the previous design, 150 MIPS/W [16]. Fig.…”

Section: Resultsmentioning

confidence: 71%

“…A 32-b RISC core processor R3900 is implemented by about 440 k transistors, including a 32-b multiply/accumulate (MAC) unit, a 4-kB direct mapped instruction cache, and a 1-kB two-way set-associative data cache [16]. Layout is slightly modified for the VS scheme and the VTCMOS.…”

Section: Resultsmentioning

confidence: 99%

“…This control also reduces fluctuations, which is essential in low-voltage design. A 32-b RISC core processor is designed with the VS scheme in the VTCMOS 0018-9200/98$10.00 © 1998 IEEE [15] and achieves more than double the MIPS/W performance compared with the previous CMOS design [16] in the same technology.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Variable supply-voltage scheme for low-power high-speed CMOS digital design

Kuroda

Suzuki

Mita

et al. 1998

IEEE J. Solid-State Circuits

222

View full text Add to dashboard Cite

This paper describes a variable supply-voltage (VS) scheme. From an external supply, the VS scheme automatically generates minimum internal supply voltages by feedback control of a buck converter, a speed detector, and a timing controller so that they meet the demand on its operation frequency. A 32-b RISC core processor is developed in a 0.4-m CMOS technology which optimally controls the internal supply voltages with the VS scheme and the threshold voltages through substrate bias control. Performance in MIPS/W is improved by a factor of more than two compared with its conventional CMOS design. Index Terms-Buck converter, low power CMOS circuits, low threshold voltage, low voltage.

show abstract

Section: Resultsmentioning

confidence: 71%

Section: Resultsmentioning

confidence: 99%