Asia and South Pacific Conference on Design Automation, 2006.
DOI: 10.1109/aspdac.2006.1594653
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A 16-bit, low-power microsystem with monolithic MEMS-LC clocking

Abstract: Fig. 1. Microsystem architecture.Abstract-Single-chip systems save the power dissipation that would be required for chip-to-chip communication, resulting in compact, low-power solutions for battery-powered applications. This paper describes the design and measured performance of a fully-functional digital core with a low-jitter, on-chip, MEMS-LC clock reference. This chip has been fabricated in TSMC's 0.18 m MM/RF bulk CMOS process. Maximum power consumption of the complete microsystem is 48.78mW operating at … Show more

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“…The Gen-1 microsystem (Fig. 3) included an analog front-end, a microcontroller, and an LCO clock source and was fabricated as a single chip in 0.18 µm technology [24]. The low-power microcontroller employed a 16-bit datapath, 24-bit address space, and 3 pipeline stages.…”
Section: Wims Series Microsystems With Hybrid On-chip Clock Sourcesmentioning
confidence: 99%
“…The Gen-1 microsystem (Fig. 3) included an analog front-end, a microcontroller, and an LCO clock source and was fabricated as a single chip in 0.18 µm technology [24]. The low-power microcontroller employed a 16-bit datapath, 24-bit address space, and 3 pipeline stages.…”
Section: Wims Series Microsystems With Hybrid On-chip Clock Sourcesmentioning
confidence: 99%