A 17.4-b Delta-Sigma Capacitance-to-Digital Converter for One-Terminal Capacitive Sensors

Jung, Young‐Dae; Duan, Quanzhen; Roh, Jeongjin

doi:10.1109/tcsii.2015.2505960

Cited by 31 publications

(23 citation statements)

References 6 publications

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“…1,13 However, the main drawback of this technique is that it is an oversampling technique in which the measurement bandwidth is typically below 100 Hz, or even lower. 1,13 However, the main drawback of this technique is that it is an oversampling technique in which the measurement bandwidth is typically below 100 Hz, or even lower.…”

Section: Discussionmentioning

confidence: 99%

“…where P D is the power consumption of the interface, T M is the conversion time, and CR and ENOB are the capacitance resolution and effective resolution in bits, which are calculated as [13][14][15][16][17][18][19][20] ENOB ¼…”

Section: Comparison and Discussionmentioning

confidence: 99%

“…Depending on how the capacitive sensor is connected to the electronic interface circuit, the interface principles can be categorized as (1) capacitive sensors with a grounded target electrode [9][10][11][12][13] ; (2) capacitive sensors with an active target electrode [14][15][16][17][18][19][20][21][22] ; and (3) capacitive sensors with a floating target electrode. 23,24 It should be mentioned that in all categories, to reduce external interference, the sensor plates need to be connected to the interface via a shielded cable.…”

Section: Discussionmentioning

confidence: 99%

“…11,12 Several solutions for interfaces with a grounded capacitive sensor have been proposed. [9][10][11][12][13] In the papers referenced, it has been shown that the use of a switched-capacitor-based approach improves the stability of the active guarding, significantly. However, not much research has been conducted yet on the effect of switched-capacitor active guarding on systematic errors and absolute accuracy with grounded capacitive sensor interfaces.…”

Section: Discussionmentioning

confidence: 99%

“…The latest high-performance capacitive sensor readouts often use the sensor capacitor in the analog-to-digital converter (ADC)/sigma-delta itself. 1,13 However, the main drawback of this technique is that it is an oversampling technique in which the measurement bandwidth is typically below 100 Hz, or even lower. Increasing the clock rate and order of the loop filter in the sigma-delta modulator can lead to a higher measurement bandwidth, but at the cost of higher power dissipation and greater circuit complexity.…”

Section: Discussionmentioning

confidence: 99%

See 4 more Smart Citations

Design trade‐offs of a capacitance‐to‐voltage converter with a zoom‐in technique for grounded capacitive sensors

Bijargah

Heidary

Torkzadeh

et al. 2018

Circuit Theory & Apps

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This paper presents a low-power, high-precision capacitance-to-voltage converter (CVC) for grounded capacitive sensors. To measure very small capacitance variations in the presence of a large offset capacitance, a new zoom-in structure is proposed. The major non-idealities of the CVC such as the settling error, charge injection, and parasitic capacitance of the switches are minimized through an optimized design. Accordingly, it is shown that the zoom-in technique can significantly reduce many of these errors. The effect of the parasitic capacitances around the sensor capacitance is significantly reduced by using a switched-capacitor-based active-shielding technique. The interface is designed as an integrated circuit using a standard 0.18-μm CMOS technology. Simulation results show that for a sensor capacitor with a nominal value of 10 pF, variation of only 200 fF, and parasitic capacitance of up to 20 pF, a worst-case capacitance error of 0.2 fF can be achieved by taking into account the layout mismatches and the interconnection effects. The achieved latency is 100 μs, and the CVC consumes only 80 μA from a 2-V power supply. The simulated input capacitance resolution for this latency is 123 aF, which is quite close to our calculated resolution (126 aF). This resolution corresponds to an energy efficiency of 9.82 pJ/Step. A temperature sweep simulation has been performed over the temperature range from −45°C to 125°C to demonstrate the small thermal drift of the designed circuit.

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Section: Discussionmentioning

confidence: 99%

Section: Comparison and Discussionmentioning

confidence: 99%

Section: Discussionmentioning

confidence: 99%

Section: Discussionmentioning

confidence: 99%

Section: Discussionmentioning

confidence: 99%

See 3 more Smart Citations

Design trade‐offs of a capacitance‐to‐voltage converter with a zoom‐in technique for grounded capacitive sensors

Bijargah

Heidary

Torkzadeh

et al. 2018

Circuit Theory & Apps

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An accurate and power‐efficient period‐modulator‐based interface for grounded capacitive sensors

Bijargah

Heidary

Torkzadeh

et al. 2019

Circuit Theory & Apps

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A low-power and high-resolution capacitance-to-period converter (CPC) based on period modulation (PM) for subnanometer displacement measurement systems is proposed. The presented circuit employs the interface developed in a previous work, "a grounded capacitance-to-voltage converter (CVC) based on a zoom-in structure," further improving its performance through a symmetrical design of the applied autocalibration technique. The scheme is based on the use of a relaxation oscillator. To minimize the error contributed by the CPC circuitry, different precision techniques such as chopping, autocalibration, and active shielding are applied. The proposed CPC is realized in a 0.18-μm complementary metal-oxide-semiconductor (CMOS) technology, occupies an area of 0.5 mm 2 , and consumes 135 μA from a 2-V power supply. In order to achieve optimal performance and avoid overdesigning, a noise estimation of various parts of the CPC has been done. Accordingly, for a 10-pF sensor capacitance, the overall CPC demonstrates a capacitance resolution of 0.5 fF for a latency of 128 microseconds, corresponding to an effective number of bits (ENOB) of 12.5 bits and an energy efficiency of 6 pJ/step. The nonlinearity error has been evaluated as well, resulting in a less than 0.03% full-scale span (FSS).

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Low-Noise CMOS Signal Conditioning Circuits

Sonkusale

Baghini

Aeron

2022

Flexible Bioelectronics With Power Autonomous Sensing and Data Analytics

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A 17.4-b Delta-Sigma Capacitance-to-Digital Converter for One-Terminal Capacitive Sensors

Cited by 31 publications

References 6 publications

Design trade‐offs of a capacitance‐to‐voltage converter with a zoom‐in technique for grounded capacitive sensors

Design trade‐offs of a capacitance‐to‐voltage converter with a zoom‐in technique for grounded capacitive sensors

An accurate and power‐efficient period‐modulator‐based interface for grounded capacitive sensors

Low-Noise CMOS Signal Conditioning Circuits

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