A 2.4 GHz 87 μW low-noise amplifier in 65 nm CMOS for IoT applications

Wu, Jingwei; Guo, Benqing; Wang, Huifen; Li, Haifeng; Li, Lei; Zhou, Wenjiao

doi:10.1142/s0217984921504856

Cited by 13 publications

(2 citation statements)

References 35 publications

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“…The zero generation is due to the coexistence of the CG stage and current mirror-slow path and CS stage-fast path. Unfortunately, this method gains simplicity but ignores the miller capacitance effect on poles/zeros [12][13]. In this paper, to avoid the impractical high-order polynomial function derivation and solving, we turn to simulation for design insight.…”

Section: Figure 5 Simplified Circuit Model For Bandwidth Analysismentioning

confidence: 99%

A Baseband-Noise-Cancelling Mixer-First CMOS Receiver Frontend Attaining 220 MHz IF Bandwidth With Positive-Capacitive-Feedback TIA

et al. 2023

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In this paper, by using the baseband noise cancellation, a CMOS mixer-first analog receiver with power reduction is proposed. Based on a current-mirror transimpedance amplifier structure, positive capacitive feedback is applied to manipulate poles/zeros location, enabling a wide baseband bandwidth and out-of-band second-order filtering profile. The additional radio frequency N-path filtering and baseband 40dB/dec roll-off absorb out-of-band interferences. The presented receiver frontend is fabricated in a standard 65 nm CMOS process. Measured results demonstrate a minimal noise figure of 2.2 dB, and an average voltage gain of 32.2 dB across the 220 MHz intermediate frequency range. The in-band and out-of-band third-order input intercept point manifests -12.8 dBm and 15.5 dBm respectively. The presented receiver circuit draws ~32 mW at a typical 1 GHz local oscillator stimulus.INDEX TERMS mixer-first receiver, noise cancellation, wideband IF, capacitive feedback.

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Section: Figure 5 Simplified Circuit Model For Bandwidth Analysismentioning

confidence: 99%

A Baseband-Noise-Cancelling Mixer-First CMOS Receiver Frontend Attaining 220 MHz IF Bandwidth With Positive-Capacitive-Feedback TIA

et al. 2023

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“…The image rejection, which G LNAS is very small, is achieved at ω IR . From Equation (18), ω LNAS is controlled by L B , C gsp and C B . ω LNAF and ω LNAS are designed at HSIEH and CHEN the same frequency.…”

Section: Resonant Gain Enhancement and Image Rejectionmentioning

confidence: 99%

A 0.45‐V low‐power low‐noise amplifier using a wideband image‐rejection technology

Hsieh,

Chen

2023

IET Microwaves Antenna & Prop

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A 0.45‐V low‐power wideband image‐rejection low‐noise amplifier (LNA) using Taiwan Semiconductor Manufacturing Company (TSMC) 0.18‐μm CMOS process has been proposed. The supply voltage, power consumption and chip area of the proposed LNA can be reduced using forward body biasing, folded cascode topology and a feedback capacitor. Moreover, a wideband gain‐enhancement‐and‐image‐rejection (WGEIR) circuit including a variable resonant LC tank and a common‐gate amplifier has been developed. The inductance of the variable resonant LC tank can enlarge the gain of the proposed LNA. The capacitance of the variable resonant LC tank can achieve the image rejection. Using the WGEIR circuit, gain enhancement and wideband image rejection can be achieved simultaneously. The variable inductors and capacitors are developed for suppressing wideband image signals and good image rejection ratio (IRR). The combination of the variable inductors and capacitors can achieve eight image‐reject frequencies under three control voltages. The proposed LNA shows the measured results including a 10‐dB power gain, a 3‐dB noise figure (NF) and a −11‐dBm input third‐order intercept point (IIP3) at 2.4 GHz, respectively. The measured IRR ranges from 18 to 23 dBc around 3.6–4.5 GHz, which is 900‐MHz image‐reject bandwidth. The measured proposed LNA using the mentioned techniques consumes 0.8‐mW power.

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An improved cascode common-source LNA with inductive source degeneration for RF applications

Gozalpour

Dodangeh

Yavari

et al. 2022

AEU - International Journal of Electronics and Communications

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A 2.4 GHz 87 μW low-noise amplifier in 65 nm CMOS for IoT applications

Cited by 13 publications

References 35 publications

A Baseband-Noise-Cancelling Mixer-First CMOS Receiver Frontend Attaining 220 MHz IF Bandwidth With Positive-Capacitive-Feedback TIA

A Baseband-Noise-Cancelling Mixer-First CMOS Receiver Frontend Attaining 220 MHz IF Bandwidth With Positive-Capacitive-Feedback TIA

A 0.45‐V low‐power low‐noise amplifier using a wideband image‐rejection technology

An improved cascode common-source LNA with inductive source degeneration for RF applications

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