A 2.5-V 10-b 120-MSample/s CMOS pipelined ADC based on merged-capacitor switching

Yoo, Sang-Min; Park, Jong-Bum; Lee, Seung‐Hoon; Moon, Un-Ku

doi:10.1109/tcsii.2004.827555

Cited by 27 publications

(1 citation statement)

References 13 publications

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“…The amplifier in each comparator attenuates the offset voltage influence and kickback noise from latches. The CFCS technique is used to reduce the capacitors mismatch requirement in the MDAC [10] . Figure 5 also shows the detailed timing diagrams of the front-end stage.…”

Section: Analog Digital Convertermentioning

confidence: 99%

A 0.18 μm CMOS fluorescent detector system for bio-sensing application

2009

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A CMOS fluorescent detector system for biological experiment is presented. This system integrates a CMOS compatible photodiode, a capacitive trans-impedance amplifier (CTIA), and a 12 bit pipelined analog-todigital converter (ADC), and is implemented in a 0.18 µm standard CMOS process. Some special techniques, such as a "contact imaging" detecting method, pseudo-differential architecture, dummy photodiodes, and a T-type reset switch, are adopted to achieve low-level sensing application. Experiment results show that the Nwell/Psub photodiode with CTIA pixel achieves a sensitivity of 0.1 A/W at 515 nm and a dark current of 300 fA with 300 mV reverse biased voltage. The maximum differential and integral nonlinearity of the designed ADC are 0.8 LSB and 3 LSB, respectively. With an integrating time of 50 ms, this system is sensitive to the fluorescence emitted by the fluorescein solution with concentration as low as 20 ng/mL and can generate 7 fA photocurrent. This chip occupies 3 mm 2 and consumes 37 mW.

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Section: Analog Digital Convertermentioning

confidence: 99%