A 2-GHz low-phase-noise integrated LC-VCO set with flicker-noise upconversion minimization

Abstract

A fully integrated 2-GHz very low-phase-noise LC-tank voltage-controlled oscillator (VCO) set with flicker noise upconversion minimization is presented. Using only integrated planar inductors, the measured phase noise is as low as 125.1 dBc/Hz at 600-kHz offset and 138 dBc/Hz at 3 MHz. The excellent phase-noise performance is achieved by means of an in-house-developed integrated inductor simulator-optimizer. To minimize the upconversion of flicker noise to 1/ 3 phase noise, a flicker-noise upconversion factor is defined, which can easily be extracted from circuit simulation. The technique is applied to demonstrate the relationship between the flicker-noise upconversion and the overdrive level of the oscillators' MOS cross-coupled pair and to develop circuit balancing techniques to even further reduce the flicker-noise upconversion. The 1/ 3 phase-noise corner is minimized to be less than 15 kHz. The VCO's are implemented in a three-metal layer, 0.65-m BiCMOS process, using only MOS active devices.Index Terms-Analog integrated circuits, flicker-noise upconversion, phase noise, voltage controlled oscillators.

Design of low power CMOS LC VCO for direct conversion transceiver

“…The second noise source is produced by thermal noise of FETs. The third component of noise is produced by noise frequencies around the second harmonic [17] and also flicker noise from the tail current source, which enters the LC tank to be up-converted due to the mixing action of the VCO circuit [18]. Usually the tail current transistor is used to set the bias current and also provides the high impedance path to the ground.…”

Quadrature Sine Wave Signals Generated by Selection Topology and its Components

“…A reverse biased diode used as a capacitor [4] and its simplified electrical model are shown in [5]. This simplified model considers the parasitic resistance in series with the capacitance.…”

Study and simulation of CMOS LC oscillator phase noise and jitter

“…We have employed this environment to perform long time domain transient simulations and calculate the period jitter through statistical analysis. First each cycle period, T k , was determined and the period jitter was calculated from (8). It was expected that the jitter process would exhibit a zero mean Gaussian distribution.…”

“…In [7], the details of this process are described. Here we show improvement techniques that reduce the flicker noise upconversion from this source and improve the oscillator phase noise performance by elaborating on the techniques presented previously in [8].…”

“…PMOS devices exhibit a flicker noise power spectral density that is as much as 10 times less than comparable NMOS devices [8]. Choosing the tail current source to be PMOS as opposed to NMOS will realize gains of approximately 10dB in terms of phase noise performance.…”