A 20 bit logarithmic number system processor

Logarithmic arithmetic as an alternative to floating-point: A review

“…Implementation work began with Swartzlander and Alexopoulos's 1975 paper [3], with a 12-bit device [4], while a 1988 scheme extended the width to 20 bits [5]. Both designs were direct implementations of Eqn.…”

“…LNS addition and subtraction require lookup tables whose size grows exponentially (several times 2 l words), with logarithms that are of width l bits. For this reason, implementations described in the early literature were limited to 8-12 bits of fractional precision [4], [5].…”

The Residue Logarithmic Number System: Theory and Implementation

“…Prior LNS designers [22] have realized the inefficiency of the naïve approach. Many table-reduction techniques are possible for binary LNS [15].…”

“…The following improved algorithm is, with few variations, the standard method used for addition in prior LNS applications [3,22]. The first step computes z = |x − y| by selecting either z α or z β :…”

“…Some implementations [22] have checked these with two two-input multiplexors (one based on z α > 0 and the other based on |z α | > M ez ); however, for this paper it is convenient to consider this as a four-input multiplexor. The value sign comes from the sign of the larger input:…”