A 20-Gb/s Transmitter With Adaptive Preemphasis in 65-nm CMOS Technology

Kao, Shih-Yuan; Liu, Shen-Iuan

doi:10.1109/tcsii.2010.2047316

Cited by 22 publications

(10 citation statements)

References 15 publications

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“…Pre-cursors and post-cursors can be removed by boosting the high-frequency components [7], [8] or attenuating the low-frequency components of data symbols [9], [10] prior to transmission. The former increases cross-talk as cross-talk intensifies at high frequencies.…”

Section: Near-end Channel Equalizationmentioning

confidence: 99%

Adaptive decision feedback equalization for multi-Gbps data links

Abdullah¹

2021

Preprint

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Channel equalization combats the effects of the imperfection of wire channels. This dissertation deals with adaptive decision feedback channel equalization. The dissertation starts with an in depth study of the challenges encountered in the design of adaptive DFE and techniques that address these challenges. Various 2-dimensional eye-opening monitors (EOMs) based adaptive DFE are proposed and implemented. A novel 2-dimensional hexagon EOM is proposed and its effectiveness is validated using simulation. A simplified and power efficient 2-dimensional hexagon EOM is also introduced. Both EOMs are capable of differentiating the severity of the violation of the minimum eye-opening so as to allow the DFE to take different actions adaptively and achieve desired eye-opening more rapidly. A maximum-jitter EOM-based adaptive DFE is also introduced to greatly reduce system complexity. The adaptive DFE is taped out in a 130nm 1.2V CMOS technology and finally an improved adaptive engine that outperforms DFE utilizing sign-sign least-mean-square is proposed.

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Section: Near-end Channel Equalizationmentioning

confidence: 99%

Adaptive decision feedback equalization for multi-Gbps data links

Abdullah¹

2021

Preprint

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“…Pre‐cursors and post‐cursors can be removed by boosting the high‐frequency components [41, 42] or attenuating the low‐frequency components of data symbols [43, 44] prior to their transmission. The former increases cross‐talk as crosstalk intensifies at high frequencies.…”

Section: Channel Equalisationmentioning

confidence: 99%

Design techniques for decision feedback equalisation of multi‐giga‐bit‐per‐second serial data links: a state‐of‐the‐art review

Yuan

Al-Taee

et al. 2014

IET Circuits, Devices & Systems

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This study provides a comprehensive review of decision feedback equalisation (DFE) for multi-giga-bit-per-second (Gbps) data links. The state-of-the-art of DFE for multi-Gbps serial links reported in the past decade are compiled and presented. The imperfection of wire channels, in particular, finite bandwidth, reflection and cross-talk and their impact on data transmission are investigated. The fundamentals of both near-end and far-end channel equalisation to combat the effect of the imperfection of wire channels at high frequencies are explored. A detailed examination of the principle, configuration, operation and limitation of DFE is followed. Design challenges encountered in design of DFE for multi-Gbps data links including timing constraints, sampling, error propagation, arithmetic operation, highly dispersive channels, power consumption and techniques and circuit implementations that address these challenges are studied. The need for adaptive DFE and the principles of adaptive DFE are investigated. Finally, the performance of various adaptive DFEs is examined and their pros and cons are compared.

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“…The main cursor represents the transmitted data and is used for data recovery while precursors and post-cursors must be removed by means of channel equalization. Boosting the high-frequency components [45,46] or attenuating the low-frequency components of data symbols prior to their transmission, known as pre-emphasis, are effective [47,48]. Since the former deteriorates crosstalk, the latter is generally preferred.…”

Section: Channel Equalizationmentioning

confidence: 99%

Design Techniques for High-Speed I/Os: Challenges and Opportunities

Yuan¹

2014

J Elec Electron Syst

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A 20-Gb/s Transmitter With Adaptive Preemphasis in 65-nm CMOS Technology

Cited by 22 publications

References 15 publications

Adaptive decision feedback equalization for multi-Gbps data links

Adaptive decision feedback equalization for multi-Gbps data links

Design techniques for decision feedback equalisation of multi‐giga‐bit‐per‐second serial data links: a state‐of‐the‐art review

Design Techniques for High-Speed I/Os: Challenges and Opportunities

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