1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156)
DOI: 10.1109/isscc.1998.672469
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A 200 MHz 1.2 W 1.4 GFLOPS microprocessor with graphic operation unit

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Cited by 8 publications
(3 citation statements)
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“…Previously, we used different cores, SH3-DSP cores [2,3] for the application processors of cellular phones and SH-4 cores [4][5][6] for system LSIs of car navigation systems. However, design and verification costs increase with the integrated logic scale.…”
Section: Unification Of Processor Corementioning
confidence: 99%
“…Previously, we used different cores, SH3-DSP cores [2,3] for the application processors of cellular phones and SH-4 cores [4][5][6] for system LSIs of car navigation systems. However, design and verification costs increase with the integrated logic scale.…”
Section: Unification Of Processor Corementioning
confidence: 99%
“…Due to a lack of automated tools, designers incorporated application-specific functionality in CPUs by adding specialized coprocessors. 6,7 This approach produces communication overhead between the CPU and the coprocessor, making system design more arduous.…”
Section: Processor Developmentmentioning
confidence: 99%
“…Some DSP and media processors satisfy this by means of eight-way VLIW architectures. [2][3][4][5][6] However, for embedded processors, less code, low power, and small dies are mandatory. To satisfy these requirements, we developed an embedded processor using a four-way VLIW architecture.…”
Section: An Embedded Vliw Processormentioning
confidence: 99%