A 200ns settling time fully integrated low power LDO regulator with comparators as transient enhancement

A 0.18 μm CMOS LDO Regulator for an On-Chip Sensor Array Impedance Measurement System

“…Compared to previous proposals based on the dynamic technique [ 27 , 28 , 29 , 30 ], the main advantage of the proposed current bias boosting circuit (CBBC) is that it effectively improves the transient response both with simpler circuitry (<4% of the total chip, including both C QF ) and with no additional ground current, therefore not degrading the system power consumption and size. More in detail, the LDO in [ 27 ] makes use of a simple differential pair as error amplifier, with triple transient improved loops; it achieves similar regulating performances, exhibiting comparable FoMs, but with a quiescent current 3.6 times greater and twice the area.…”

“…Alternatively, dynamic techniques rely on the employment of auxiliary current boosting paths to improve the transient behavior, which are only active during transient periods but that remain off in steady state. Therefore, the system can operate with reduced quiescent current, and then the charging/discharging current at the gate of the power transistor [ 27 ] or the biasing current of the error amplifier are increased momentarily [ 28 , 29 , 30 ].…”

“…That is why this paper applies this approach to achieve an internally compensated LDO regulator with enhanced time response thanks to the introduction of a novel dynamic current boosting bias circuit. Over other proposals based on this technique [ 27 , 28 , 29 , 30 ], this scheme manages to work with no additional quiescent current and minimal additional circuitry, thus resulting in an ultralow power LDO with very competitive static and dynamic regulating performances.…”

A Low-quiescent Current Full on-chip 1.2 V CMOS Low Drop-Out Regulator

“…Therefore, the design of on-chip capacitor-less regulators requires new compensation schemes and transient enhancement techniques to allow greater integration capability without degrading the performances in terms of regulation, size and power efficiency. To accomplish this goal, several techniques have been proposed that usually involve increasing the chip area and power consumption [1][2][3].…”

“…The LDO main performances are summarized in Table 1 and compared with previous designs with similar specifications [2,3].…”