2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) 2017
DOI: 10.1109/rfic.2017.7969087
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A 20dBm outphasing class E PA with high efficiency at power back-off in 65nm CMOS technology

Abstract: -This paper presents an outphasing class E PA (OEPA) in a 65nm CMOS technology, using a pcb transmission-line based power combiner. The OEPA can provide +20dBm output power from VDD=1.25V at 1.4GHz with 61% drain efficiency (DE) and 58% power added efficiency (PAE). We introduced a technique to rotate and shift power and efficiency contours of the two branch PAs that enables more than 44dB output power dynamic range, reduces switch voltage stresses compared to conventional OEPAs and enables 41% DE and 24% PAE … Show more

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Cited by 7 publications
(8 citation statements)
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“…[5] (although the same final results for Z 1,2 were obtained). Secondly, because of the symmetry of the PA loads Z 1,2 and of the normalized output voltages contours with respect to the real axis, for all outphasing angles Vout,1 Vout,2 = 1 which proves the validity of our assumption leading to (7).…”
Section: Simplified Theory Of Oepassupporting
confidence: 52%
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“…[5] (although the same final results for Z 1,2 were obtained). Secondly, because of the symmetry of the PA loads Z 1,2 and of the normalized output voltages contours with respect to the real axis, for all outphasing angles Vout,1 Vout,2 = 1 which proves the validity of our assumption leading to (7).…”
Section: Simplified Theory Of Oepassupporting
confidence: 52%
“…Firstly, the maximum voltage of the switches can be very high [6], [7]. Being implemented by transistors, there is a trade off between switch performance (e.g.…”
Section: Introductionmentioning
confidence: 99%
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