A 240-MHz Low-Pass Filter With Variable Gain in 65-nm CMOS for a UWB Radio Receiver

Saari, Ville; Kaltiokallio, Mikko; Lindfors, S.; Ryynänen, Jussi; Halonen, K.

doi:10.1109/tcsi.2008.2006213

Cited by 51 publications

(34 citation statements)

References 35 publications

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“…. Compared to previous work we achieve either a much higher linearity [5], or a lower noise level [6] and lower power consumption. Compared to the most similar filter in [2] we obtain over 3dB higher SFDR at lower power consumption, while not needing a regulated supply.…”

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confidence: 70%

“…The transconductors and MOM capacitors are sized for a nominal Fc of 450MHz. The use of 110nm gate lengths in 28nm UTBB FD-SOI technology makes the transconductor output resistance sufficiently constant and well controlled that it can be compensated by a fixed negative resistance, eliminating the need for Q-tuning as used in previous designs [1,2,5]. The increased MOSFET parasitic capacitances are absorbed in the filter capacitances.…”

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confidence: 99%

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5.5 A forward-body-bias tuned 450MHz Gm-C 3^rd-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supply

Lechevallier

Struiksma

Sherry

et al. 2015

2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers

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Due to the absence of internal nodes, inverter-based Gm-C filters [1,2] allow achieving bandwidths beyond what is possible with opamp-RC techniques. The inverter's class-AB behavior, together with the high transconductance per quiescent current, results in a high dynamic range per power when optimally biased [3]. The major disadvantage of traditional inverter-based Gm-C filters is that they are tuned with the supply voltage (VDD), hence requiring a finely controllable supply. Voltage regulators used to accomplish this imply a voltage headroom (including margin for tuning) and degrade total power efficiency by tens of percent. In this paper, we show that by exploiting body biasing in an Ultra-Thin BOX and Body, Fully-Depleted SOI (UTBB FD-SOI) CMOS technology, we overcome the requirement for a tunable VDD in inverter-based Gm-C filters, while achieving a high linearity over a wide supply voltage range. Without body biasing, Gm changes and linearity is degraded. For high VDD, the inverter behavior is compressive (mobility reduction), while for low VDD it is expansive (exponential region). Only one VDD results in a flat Gm-curve, which means that it produces little 3rd order distortion. Body biasing can be applied to tune Gm back to its nominal value over different VDD, without linearity degradation, as illustrated in the bottom right plot of Fig. 5.5.1. We apply this technique to a low-pass (LP) Gm-C filter to keep the cut-off frequency (Fc) constant and to guarantee high linearity over a 300mV supply voltage range. Local supply decoupling is still required, but the separate voltage regulator can be omitted. Without this technique, the same supply variation would have shifted the cut-off frequency between 110 and 650MHz and degraded IIP3 by more than 10dB.The LP filter topology shown in Fig. 5.5.2 is derived from a 3rd order, doubly terminated Butterworth LC ladder prototype using gyrator synthesis [1]. The transconductors and MOM capacitors are sized for a nominal Fc of 450MHz. The use of 110nm gate

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confidence: 70%

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confidence: 99%

5.5 A forward-body-bias tuned 450MHz Gm-C 3^rd-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supply

Lechevallier

Struiksma

Sherry

et al. 2015

2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers

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“…Another possibility is to implement a real pole with passive components at the mixer-baseband interface [59]- [63], as will be discussed in more detail in Sections 4.1.2 and 5.2. Both these options are illustrated in Fig.…”

Section: Partitioning Of Filtering and Amplificationmentioning

confidence: 99%

Continuous-Time Low-Pass Filters for Integrated Wideband Radio Receivers

Saari¹

2012

Analog Circuits and Signal Processing

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This thesis concentrates on the design and implementation of analog baseband continuoustime low-pass filters for integrated wideband radio receivers. A total of five experimental analog baseband low-pass filter circuits were designed and implemented as a part of five single-chip radio receivers in this work. After the motivation for the research work presented in this thesis has been introduced, an overview of analog baseband filters in radio receivers is given first. In addition, a review of the three receiver architectures and the three wireless applications that are adopted in the experimental work of this thesis is presented. The relationship between the integrator nonidealities and integrator Q-factor, as well as the effect of the integrator Q-factor on the filter frequency response, are thoroughly studied on the basis of a literature review. The theoretical study that is provided is essential for the gm-C filter synthesis with non-ideal lossy integrators that is presented after the introduction of different techniques to realize integrator-based continuous-time low-pass filters. The filter design approach proposed for gm-C filters is original work and one of the main points in this thesis, in addition to the experimental IC implementations. Two evolution versions of fourth-order 10-MHz opamp-RC low-pass filters designed and implemented for two multicarrier WCDMA base-station receivers in a 0.25-um SiGe BiCMOS technology are presented, along with the experimental results of both the low-pass filters and the corresponding radio receivers. The circuit techniques that were used in the three gm-C filter implementations of this work are described and a common-mode induced even-order distortion in a pseudo-differential filter is analyzed. Two evolution versions of fifth-order 240-MHz gm-C low-pass filters that were designed and implemented for two single-chip WiMedia UWB direct-conversion receivers in a standard 0.13-um and 65-nm CMOS technology, respectively, are presented, along with the experimental results of both the lowpass filters and the second receiver version. The second UWB filter design was also embedded with an ADC into the baseband of a 60-GHz 65-nm CMOS radio receiver. In addition, a thirdorder 1-GHz gm-C low-pass filter was designed, rather as a test structure, for the same receiver. The experimental results of the receiver and the third gm-C filter implementation are presented.Keywords Analog integrated circuits, CMOS, continuous-time filters, radio receivers Tiivistelmä Tässä väitöskirjassa on tutkittu analogisten kantataajuisten jatkuva-aikaisten alipäästö-suodattimien toteutusta integroituihin laajakaistaisiin radiovastaanottimiin. Työssä on suunniteltu ja toteutettu yhteensä viisi analogista kantataajuista alipäästösuodatinpiiriä viiteen yhdelle puolijohdepalalle integroituun radiovastaanottimeen. Väitöskirjan alussa esitetään tutkimustyön taustoja, jonka jälkeen luodaan yleiskatsaus analogisiin kantataajuussuodattimiin osana radiovastaanotinta. Lisäksi tarkastellaan niitä kolmea vast...

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“…OTA-C filters are frequently used in mixed-signal systems on a chip (SoC) [1,2]. These filters provide a necessary signal pre and post processing in a mixed analogue-digital environment, where the analogue signals have to be limited in frequency before and after the analogue to digital and digital to analogue conversions.…”

Section: Introductionmentioning

confidence: 99%

Technique to improve CMRR at high frequencies in CMOS OTA-C filters

Blakiewicz¹

2013

Bulletin of the Polish Academy of Sciences: Technical Sciences

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Abstract. In this paper a technique to improve the common-mode rejection ratio (CMRR) at high frequencies in the OTA-C filters is proposed. The technique is applicable to most OTA-C filters using CMOS operational transconductance amplifiers (OTA) based on differential pairs. The presented analysis shows that a significant broadening of CMRR bandwidth can be achieved by using a differential pair with the bodies of transistors connected to AC ground, instead of using a pair with the bodies connected to the sources. The key advantages of the technique are: no increase in power consumption (except for an optional tuning circuit), a small increase of a chip area, a slight modification of the original filter. The simulation results for exemplary OTAs and a low-pass filter, designed in a 0.35 µm CMOS process, show the possibility of broadening the CMRR bandwidth several times.

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A 240-MHz Low-Pass Filter With Variable Gain in 65-nm CMOS for a UWB Radio Receiver

Cited by 51 publications

References 35 publications

5.5 A forward-body-bias tuned 450MHz Gm-C 3^rd-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supply

5.5 A forward-body-bias tuned 450MHz Gm-C 3^rd-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supply

Continuous-Time Low-Pass Filters for Integrated Wideband Radio Receivers

Technique to improve CMRR at high frequencies in CMOS OTA-C filters

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A 240-MHz Low-Pass Filter With Variable Gain in 65-nm CMOS for a UWB Radio Receiver

Cited by 51 publications

References 35 publications

5.5 A forward-body-bias tuned 450MHz Gm-C 3rd-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supply

5.5 A forward-body-bias tuned 450MHz Gm-C 3rd-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supply

Continuous-Time Low-Pass Filters for Integrated Wideband Radio Receivers

Technique to improve CMRR at high frequencies in CMOS OTA-C filters

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Product

Resources

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5.5 A forward-body-bias tuned 450MHz Gm-C 3^rd-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supply

5.5 A forward-body-bias tuned 450MHz Gm-C 3^rd-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supply