In this paper, the design and test of a single-chip RF pulse-width modulator and driver (PWMD) aimed at exciting a high-power class-E GaN high-power stage at 435 MHz is described. For the required buffer size, avoiding potential ringing of the pulses within the buffer structure presents a major challenge in the design process. Therefore, a smaller test chip capable of driving capacitive loads of up to 5 pF was initially designed, fabricated, and tested. An approach based on three-dimensional electromagnetic simulations was used to validate the test results and offers excellent simulation accuracy. Based on the results obtained for test chip an enlarged PWMD chip capable of driving a 40 W high-power stage has been designed and tested on passive loads representing the targeted final stage