Figure 1. Cross-sectional TEM images of 3x-nm TLC NAND flash memory cell string with bit line and word line direction.Abstract-In this paper, the limitations and challenges of NAND flash memory devices based on floating gates are discussed. And, the newly adopted operation algorithms, such as intelligent incremental step pulse erase, various biasing in grouped W/Ls, virtual negative read and data randomization, and their results are exhibited.