A 360-fs-Time-Resolution 7-bit Stochastic Time-to-Digital Converter With Linearity Calibration Using Dual Time Offset Arbiters in 65-nm CMOS

Chung, Hayun; Hyun, Minji; Kim, Jungwon

doi:10.1109/jssc.2020.3036960

Cited by 10 publications

(4 citation statements)

References 26 publications

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“…1b ). The test chip includes three driver-less clock distribution structures as a form of metal mesh, clamper circuits for protection, D-flipflop-based active loads, an H-tree-based CDN for comparison, and a sub-ps-resolution stochastic TDC 25 to measure skew (see Methods). Note that, in order to demonstrate scalability in drivable load and efficient operation of different circuit blocks with different clock load conditions, we designed the chip with three separate clock domains (labelled as C0, C1 and C2 in Fig.…”

Section: Resultsmentioning

confidence: 99%

“…As shown in Fig. 5a , the skew is assessed by an on-chip stochastic TDC with ~100-fs resolution 25 (see Methods). The TDC measures the clock arrival time difference between the clock edges at node NS0 and at other nodes (denoted as NS1, NS2L, NS2R, NSHL and NSHR in Fig.…”

Section: Resultsmentioning

confidence: 99%

“…To measure the sub-ps time skew of photonic CDNs, we employed an 8-bit dual-supply stochastic TDC with ~100-fs time resolution 25 (Supplementary Fig. 4b ).…”

Section: Methodsmentioning

confidence: 99%

“…By dividing the clock domains into multiple sections with driver-less metal structures, the CDN can be implemented in a scalable way. The final inter-domain skews can be compensated by monitoring them with a ~ 100-fs-resolution on-chip time-to-digital converter (TDC) 25 and sending the timing information to the optical domain.…”

Section: Introductionmentioning

confidence: 99%

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Femtosecond-precision electronic clock distribution in CMOS chips by injecting frequency comb-extracted photocurrent pulses

Hyun

Chung

et al. 2023

Nat Commun

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A clock distribution network (CDN) is a ubiquitous on-chip element that provides synchronized clock signals to all different circuit blocks in the chip. To maximize the chip performance, today’s CDN demands lower jitter, skew, and heat dissipation. Conventionally, on-chip clock signals have been distributed in the electric voltage domain, resulting in increased jitter, skew, and heat dissipation due to clock drivers. While low-jitter optical pulses have been locally injected in the chip, research on effective distribution of such high-quality clock signals has been relatively sparse. Here, we demonstrate femtosecond-precision distribution of electronic clocks using driver-less CDNs injected by photocurrent pulses extracted from an optical frequency comb source. Femtosecond-level on-chip jitter and skew can be achieved for gigahertz-rate clocking of CMOS chips by combining ultralow comb-jitter, multiple driver-less metal-meshes, and active skew control. This work shows the potential of optical frequency combs for distributing high-quality clock signals inside high-performance integrated circuits, including 3D integrated circuits.

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Section: Resultsmentioning

confidence: 99%

Section: Resultsmentioning

confidence: 99%

“…To measure the sub-ps time skew of photonic CDNs, we employed an 8-bit dual-supply stochastic TDC with ~100-fs time resolution 25 (Supplementary Fig. 4b ).…”

Section: Methodsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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