A 4×40 W digital input class-AB power DAC with 100 dB dynamic range

Abstract

In audio applications, the trend toward realization of System-On-Chip solutions necessarily goes through a single chip that converts the digital audio signal (coming from a CD, etc.) to an analog power signal to be delivered to low-impedance speakers. These systems are considerably challenging due to the requirements for both high audio quality (DR > 96dB) and large output power (> 10W) to low resistance loads. To avoid signal corruption due to interference from the high power circuitry, a two-chip solution is typically adopted. A low-voltage chip realizes the D/A conversion (i. e. interpolator, noise shaper, SC/CT analog filter) and a high-voltage chip receives the low-level analog signal and delivers high power to the loudspeakers ( Fig. 7.3.1). In this solution, progressive supply voltage scaling of the technology adopted in the first chip (down to 1.8V and below) increases the sensitivity of the low-voltage DAC output to external disturbances (particularly strong in car-radio) and makes achieving high-quality performance more and more difficult.Here, the first single-chip solution for car-audio systems is presented. The design avoids audio quality loss due to external disturbances and realizes internally both the D/A converter and the power amplifier ( Fig. 7.3.1). This choice allows merging of the filter and the power stage, reducing the noise sources and improving the system robustness. In addition, sufficient rejection of the internal disturbances from the high voltage power stage and the digital circuitry to the low-voltage analog section is guaranteed by proper design choices (multibit code and class-AB output stage) and by proper layout solutions allowed in the BCD technology. This design results in a compact device with only digital input and power output signals that achieves up to 100dB DR and 40W power to four 4Ω loads. Moreover, applications utilizing this device are simpler and less expensive (with a limited number of external components) than that using the two-chips solution. Figure 7.3.1 shows the proposed single-chip solution.The digital input signal (32kHz < f s < 48kHz) is oversampled by the interpolator to a 64•f s frequency, and then supplied to a 3rd-order, 7b noise-shaper. The output word drives a current-mode D/A interface. For a given input data, a number of unity current cells of the interface are connected to the virtual grounds (CH+ and CH-) of a fully-differential transimpedance power filtering stage that drives the load.The multibit D/A conversion gives several advantages:• Limited in-band quantization noise and no need of dithering; • Reduced out-of-band noise that alleviates the constraints on the filtering power stage order and on the pole position accuracy; • Reduced EMI in the AM frequency band, permitting use of the device in the proximity of a tuner without reducing the receiver sensitivity. For this reason a class-AB output power stage is preferred to a more efficient but more disturbing class-D stage [1]; • No need of digital pre-filtering of the noise-shaper output, as i...

An audio FIR-DAC in a BCD process for high power class-D amplifiers

“…It is evident from figure 6 that down to 0.18mm 2 , it is very advantageous to decrease the required area at the expense of increased current. Below 0.18 mm 2 , decreasing the area requires a quadratic current increase to remain within specification.…”

“…The area per channel would be about 2 mm 2 for CD quality audio. Additional measures must be taken to reduce Intersymbol Interference (ISI).…”

“…Furthermore, low distortion requires a 16-bit precision. Insufficient matching accuracy necessitates some kind of calibration or Dynamic Element Matching (DEM) [2]. The DEM solution has a high digital complexity and at least a 1 st order analog filter would still be needed.…”