It consists of an interleaved T/H section. a first SA-ADC, a A time-interleaved ADC is presented with 16 channels, DAC, an inter-stage amplifier and a second SA-ADC. Both each consisting of two Successive Approximation (SA) ADCs SA-ADCs ar 6 bit and With the (amplifier gain of 16 the in a pipeline configuration. Three techniques are presented to resolution becomes 10 bit. Pipelining an:d inter-stage gain increase the speed of arn SA-ADC. Sinlgle channel relaxes the requirements of the SA-ADC:s: more time is perfoance is 6.9 ENOB at an inlput frequency of 4 GHz. available per conversion anid the required accuracy is reduced.Multi-channel perfomiance is 7.7 ENOB at 1.35 GS/s with anlThe inter-stage amplifier uses a sxitched-capacitor opalmp ERBW of 1 GHz and a FoM of 0.6 pJ/conversion-step.configuLration witxih offset cancellation of the two-stage opamp.

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A 16-channel time-interleaved Track and Hold is presented. Three techniques are introduced enabling a high bandwidth and linearity and good timing alignment. Integrated ADCs are used to evaluate the performance of the T/H. Single channel performance is 43 dB SNDR at an input frequency of 4 GHz. Multi-channel performance is 48 dB SNDR at 1.35 GS/s with an ERBW of 1 GHz. The power consumption of the T/H including clock-driver and buffers is 74 mW.

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This paper proposes the use of a variable-gain amplifier instead of a hard limiter for amplitude modulation (AM) suppression with low AM-PM (phase modulation) conversion. A hard limiter shows phase shift variations through input-amplitude dependent changes in output waveform, combined with bandwidth limitations. It is shown that these can be kept small only for limiter bandwidths much larger than the input frequency. A linear amplifier with variable gain used for AM suppression does not suffer from this problem. A CMOS variable-gain amplifier with gain-insensitive phase shift has been designed for this purpose. The benefits and limitations of the technique are explored with reference to an experimental 2.5 pm BICMOS chip for a television IF demodulator. Experimental and simulation results indicate that the AM-PM conversion can be kept below 0.5" at 40 MHz over an input amplitude range of 20 dB, where typical hard limiters show 3-5". This is achieved with an amplifier bandwidth of 80 MHz, while a hard limiter would need a bandwidth of more than 600 MHz to obtain similar results.