2013
DOI: 10.1109/tcsi.2013.2246206
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A 4-Bit, 1.6 GS/s Low Power Flash ADC, Based on Offset Calibration and Segmentation

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Cited by 36 publications
(14 citation statements)
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“…IM3 levels of -26 dB and -40 dB are chosen to highlight the error vector magnitude (EVM) improvement pictorially, with a 14 dB change in IM3 resulting in an EVM improvement of around 5 times. Several low resolution ADCs are presented in [15], [17], [18] and one such solution could be implemented with the digital control loop for a single chip solution.…”
Section: B Test Results and Discussionmentioning
confidence: 99%
“…IM3 levels of -26 dB and -40 dB are chosen to highlight the error vector magnitude (EVM) improvement pictorially, with a 14 dB change in IM3 resulting in an EVM improvement of around 5 times. Several low resolution ADCs are presented in [15], [17], [18] and one such solution could be implemented with the digital control loop for a single chip solution.…”
Section: B Test Results and Discussionmentioning
confidence: 99%
“…However, these preamplifiers should be designed with high bandwidth and gain, which significantly increases the power consumption. As a low-power alternative, there are several offset calibration techniques to suppress comparator offset errors [14,35,36]. In flash ADCs with high resolution, the offset requirement not only becomes more stringent, the number of comparators to be calibrated also increases exponentially; this makes such calibration systems more complicated while requiring more layout area for on-chip implementation.…”
Section: Interpolating and Folding Adcsmentioning
confidence: 99%
“…Flash, folding, and interpolating ADC architectures are inherently suitable for high-speed analog-to-digital conversion. However, for medium resolutions and above, their power efficiency degrades significantly due to the large number of active comparators, [9,13,14,77,78]. For pipelined ADCs, high-performance design becomes more difficult as scaled CMOS supply voltages continue to decrease due to the stringent gain and bandwidth requirements for the opamps.…”
Section: Power-efficient High-speed Medium-resolution Adcsmentioning
confidence: 99%
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“…Since a pre-amplifier is not used in the comparator to save power, capacitors ( in Fig. 2) were added to the reference ladder for kickback noise reduction [5]. The propagation delay is 274.2ps.…”
Section: Comparator Architecture and Offset Calibration Techniquementioning
confidence: 99%