A 4-kbit Josephson nondestructive read-out RAM operated at 580 psec and 6.7 mW

Tahara, S.; Ishida, I.; Nagasawa, Shuichi; Hidaka, Mutsuo; Tsuge, H.; Wada, Y.

doi:10.1109/20.133751

Cited by 40 publications

(11 citation statements)

References 12 publications

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“…These circuits have been demonstrated by Hitachi (16), NEC (13), and Fujitsu (7,11,12). E l m c a l Laboratory (ETL) has fibricated a prototype four-bit Josephson computer and confirmed its functional operation (1 7).…”

Section: High-speed Circuitsmentioning

confidence: 84%

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Toward the Realization of a Josephson Computer

Hasuo

1992

Science

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High-quality Josephson junctions, with both electrodes made from niobium and with an aluminum-oxide insulating barrier, were introduced in 1983. This niobium junction is very stable, reliable, controllable, and reproducible. Because of these excellent characteristics, these junctions can be applied to large-scale integrated (LSI) circuits, such as microprocessors having a few thousand gates and a few kilobits of memory. These circuits operate much faster and consume less power than any semiconductor circuit now available. Integrated Josephson circuits are now being tested in a closed-cycle refrigerator. The next step is to design a special-purpose, small-scale Josephson computer and to demonstrate its high performance.

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Section: High-speed Circuitsmentioning

confidence: 84%

“…A Josephson microprocessor that used MVTL technolw was semiconductor cache memory, and these circuits are not yet M y functional (12,13).…”

Section: High-speed Circuitsmentioning

confidence: 99%

Toward the Realization of a Josephson Computer

Hasuo

1992

Science

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“…Moreover, since our proposed memory cell design seems to be much less complicated and lower size than, for example, today's state-of-the-art design [6] where Read and Write operations are implemented on separate circuits, peripheral circuits such as sense and current driver circuits could be also less complex and consequently lower size and perhaps requiring lower operational energy. We would also like to note that scaling memory cell to large arrays requires consideration of all the peripheral circuits (including decoders, drivers, sense circuits, and others [6,[21][22][23]). Consequently, since basic current and pulse driving and pulse sensing requirement of the proposed memory cell are rather common to other memory cell designs (where scaling to 64 k-bit RAM memory arrays was demonstrated [6]) we believe that scaling to large memory arrays is likely.…”

Section: Memory Performance Evaluationmentioning

confidence: 99%

“…Consequently, since basic current and pulse driving and pulse sensing requirement of the proposed memory cell are rather common to other memory cell designs (where scaling to 64 k-bit RAM memory arrays was demonstrated [6]) we believe that scaling to large memory arrays is likely. Moreover, proposed memory cell design and input/output requirements are simpler and lower size than other memory cell circuits (see, for example memory cell circuit in the references [6,22]). …”

Section: Memory Performance Evaluationmentioning

confidence: 99%

Memory states in small arrays of Josephson junctions

et al. 2016

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Abstract:We studied memory states of a circuit consisting of a small inductively coupled Josephson junction array and introduced basic (Write, Read, Reset) memory operations logics of the circuit. The presented memory operation paradigm is fundamentally different from conventional single quantum flux operation logics. We calculated stability diagrams of the zero-voltage states and outlined memory states of the circuit. We have also calculated memory access times and power dissipation for basic memory operations.PACS: 05.45.Xt, 85.25.Cp, 85.25.Hv

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“…Following these advancements, many JJ devices were built and tested: RAM, shift registers, arithmetic logic units, and entire processors both in latching and RSFQ [5]- [19] logic. For a more thorough treatment of the above discussion, refer to Likharev and Semenov [20].…”

Section: Introductionmentioning

confidence: 99%

Future heat transfer concerns in Josephson junction computers

McFall

Chow²

1999

IEEE Trans. Comp. Packag. Technol.

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Using the superconducting properties of Josephson junctions enable extremely high switching speeds unmatched in semiconducting electronics. Much research has been conducted in recent decades in order to produce high performance electronics based on Josephson junction logic. In addition to the high speeds attainable by this technology, also of significance is the very low heat dissipated by Josephson circuits. Josephson devices have made great strides in the last ten years with microprocessors reaching levels of integration as high as 10 5 junctions/cm 2 . Dissipation in these devices is easily managed, but integrations reaching 10 7 must be considered if Josephson electronics are to compete with the complexity and functionality of semiconducting electronics. Coupling this level of integration with dissipations of 0.34 and 2.98 W/junction in low and high temperature cases respectively, produces large heat fluxes difficult to remove at cryogenic temperatures. While other technical difficulties currently overshadow heat transfer concerns, the future of Josephson electronics research will likely need to address them.

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A 4-kbit Josephson nondestructive read-out RAM operated at 580 psec and 6.7 mW

Cited by 40 publications

References 12 publications

Toward the Realization of a Josephson Computer

Toward the Realization of a Josephson Computer

Memory states in small arrays of Josephson junctions

Future heat transfer concerns in Josephson junction computers

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