A 4-nm 16-Gb/s/pin Single-Ended PAM-4 Parallel Transceiver With Switching-Jitter Compensation and Transmitter Optimization

Jin, Jahoon; Lee, Soo-Min; Min, Kyunghwan; Ju, Sodam; Lim, Jihoon; Yook, Jisu; Lee, Jihoon; Chae, Hyunsu; Kang, Kwonwoo; Hong, Yunji; Jeong, Yeongcheol; Park, Sung-Sik; Kim, Sang-Ho; Lee, Jongwoo; Kim, Joonsuk; Kwak, Sung Ung

doi:10.1109/jssc.2023.3319637

IEEE J. Solid-State Circuits

2024

DOI: 10.1109/jssc.2023.3319637

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A 4-nm 16-Gb/s/pin Single-Ended PAM-4 Parallel Transceiver With Switching-Jitter Compensation and Transmitter Optimization

Jahoon Jin,

Soo-Min Lee,

Kyunghwan Min

et al.

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Cited by 7 publications

References 33 publications

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A 4-nm 16-Gb/s/pin Single-Ended PAM-4 Parallel Transceiver With Switching-Jitter Compensation and Transmitter Optimization

Jin,

Lee,

Min

et al. 2024

IEEE J. Solid-State Circuits

View full text Add to dashboard Cite

A 4-nm 16-Gb/s/pin Single-Ended PAM-4 Parallel Transceiver With Switching-Jitter Compensation and Transmitter Optimization

Jin,

Lee,

Min

et al. 2024

IEEE J. Solid-State Circuits

View full text Add to dashboard Cite

Single-Ended PAM-4 Transmitters With Data Bus Inversion and ZQ Calibration for High-Speed Memory Interfaces

Kim,

Sim,

Choi

et al. 2024

IEEE J. Solid-State Circuits

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An 8-nm 20-Gb/s/pin Single-Ended PAM-4 Transceiver With Pre/Post-Channel Switching Jitter Compensation and DQS-Driven Biasing

Min,

Jin,

Lee

et al. 2024

IEEE Solid-State Circuits Lett.

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A 4-nm 16-Gb/s/pin Single-Ended PAM-4 Parallel Transceiver With Switching-Jitter Compensation and Transmitter Optimization

Cited by 7 publications

References 33 publications

A 4-nm 16-Gb/s/pin Single-Ended PAM-4 Parallel Transceiver With Switching-Jitter Compensation and Transmitter Optimization

A 4-nm 16-Gb/s/pin Single-Ended PAM-4 Parallel Transceiver With Switching-Jitter Compensation and Transmitter Optimization

Single-Ended PAM-4 Transmitters With Data Bus Inversion and ZQ Calibration for High-Speed Memory Interfaces

An 8-nm 20-Gb/s/pin Single-Ended PAM-4 Transceiver With Pre/Post-Channel Switching Jitter Compensation and DQS-Driven Biasing

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