A 5-mW sigma-delta modulator with 84-dB dynamic range for GSM/EDGE

Oliaei, O.; Clement, P.; Gorisse, P.

doi:10.1109/4.974540

Cited by 49 publications

(5 citation statements)

References 18 publications

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“…Nyquist Rate A/D Converters Flash A/D Converters [78][79][80][81] 6 bit 1 ⁄ f ck -Subranging and Pipeline A/D Converters [82][83][84][85][86] 12 bit < N ⁄ f ck = Folding A/D Converters [87][88] 10 bit < N ⁄ f ck -Successive Approximation A/D Converters [89][90][91][92] 12 bit N ⁄ f ck = Algorithmic A/D Converters [93][94][95] 12 bit N ⁄ f ck = Oversampled A/D Converters Dual-Slope A/D Converters [96][97] 20 bit 2 N+1 ⁄ f ck + Incremental A/D Converters [98][99][100] > 16 bit 2 N ⁄ f ck ++ Sigma-Delta A/D Converters [101][102][103][104][105][106][107][108][109][110][111][112][113][114][115][116][117][118] > 18 bit < 2 N ⁄ f ck ++…”

Section: Maximum Conversion Suitable For A/d Converter Architecture Rmentioning

confidence: 99%

Interface Circuitry and Microsystems

Malcovati

Maloberti

2006

Mems

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Sensing physical or chemical quantities is a fundamental task in information processing and control systems. A sensing element or transducer converts the quantity to be measured into an electrical signal, such as a voltage, a current, or a resistive or capacitive variation. The data obtained from the transducers then have to be translated into a form understandable by humans, computers, or measurement systems. An electronic circuit called a sensor interface usually performs this task. The functions implemented by a sensor interface can range from simple amplification or filtering to A/D conversion, calibration, digital signal processing, interfacing with other electronic devices or displays, and data transmission (through a bus or, recently, through a wireless connection, such as Bluetooth).Very-large-scale integration (VLSI) technologies have been extensively used to make sensor interface circuits since the appearance of the first integrated circuit (IC) in the early 1960s. Most of the sensor systems realized so far consist of discrete sensors combined with one or more application-specific integrated circuits (ASICs) or commercial components on a printed circuit board (PCB) or hybrid board. Over the past few years, however, progress in silicon planar technologies has allowed miniaturized sensors (microsensors) to be realized by exploiting the sensing properties of IC materials (silicon, polysilicon, aluminum, silicon oxide, and nitride) or additional deposited materials (such as piezoelectric zinc oxide, sensitive polymers, or additional metallization layers).When microsensors are realized using IC technologies and materials, it is possible to integrate the interface circuit and several sensors on the same chip or in the same package, leading to microsystems or micromodules. [1][2][3][4][5][6] The potential advantages of this approach are numerous: The cost of the measurement system is greatly reduced due to batch fabrication of both the sensors and the interface circuits; its size and interconnections are minimized; and its reliability is improved.

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Section: Maximum Conversion Suitable For A/d Converter Architecture Rmentioning

confidence: 99%

Interface Circuitry and Microsystems

Malcovati

Maloberti

2006

Mems

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“…This, however, makes the design of the ADC very challenging to achieve from a dynamic range (DR) performance point of view, especially at elevated sample rates. Since these receivers are used in battery-powered devices and require high signalto-noise ratios (SNRs), switched-capacitor delta-sigma (∆Σ) ADCs have been increasingly used in cellular receivers [1], [2] since their SNR/mW ratio is one of the highest amongst all available ADC topologies, and analog domain device mismatch can usually be shaped out of band.…”

Section: Introductionmentioning

confidence: 99%

A 14-mW, 153.6-MHz clock-rate Δ∑ modulator for WCDMA with 77-dB SFDR using constant resistance CMOS input sampling switch

Adeniran

Demosthenous

2007

ESSCIRC 2007 - 33rd European Solid-State Circuits Conference

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The performance of a switched-capacitor delta-sigma (∆Σ) analog-to-digital converter (ADC) is greatly degraded by the linearity of the input sampling switch. This is especially so in older cheaper technologies where very-low threshold voltage devices are unavailable. To address the input switch sampling distortion issue, the use of an optimized bootstrapped CMOS switch is proposed in this paper, featuring a constant onresistance over the entire input signal range. The dynamic range improvement with the proposed approach is validated with the design of a fourth-order, switched-capacitor ∆Σ modulator for WCDMA in a 0.35-µm BiCMOS process technology. Measured spurious-free dynamic range (SFDR) of 77 dB is achieved at a clock-rate of 153.6 MHz. The modulator dissipates 14 mW from a 2.7-V power supply and occupies an area of 0.2 mm 2 .

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“…However, the oversampling nature of the SDM restricts the applications of SDMs to audio and measurement fields [1]. As the process technology of VLSI (very large scale integrated circuits) advances, researchers move their attentions on SDM to the wide bandwidth applications such as xDSL, Bluetooth, and GSM [2,3]. The resolution of a SDM is decided by several factors, such as oversampling ratio (OSR), levels of quantizer, and orders of the SDM.…”

Section: Introductionmentioning

confidence: 99%

Opamp gain insensitive MASH sigma delta modulator for wide bandwidth applications

Chiang

Chen

2006

Analog Integr Circ Sig Process

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This work presents a means to enhance the immunity of non-ideal opamp gain effect of the fourth order multistage noise shaped (MASH) sigma-delta modulator (SDM) for wide bandwidth applications. The first stage of the SDM is a low-distortion single-loop second order SDM, while the second stage is a low-distortion interpolative second order SDM with Chebyshev type II filter technique. Theoretically, the conventional MASH SDM is impacted by the nonlinear finite gain of the operational amplifier. This impact may have two main phenomena. First, it leaks the incompletely corrected quantization error to the output. Secondly, the nonlinearity causes the harmonic distortion of the input signal. The proposed architecture can reduce the distortion and the sensitivity of the nonlinear finite opamp gain to improve the performance by using low-distortion technique in the MASH SDM. Furthermore, the lower power budget and simplified digital cancellation logic can be achieved. The experimental results indicate that the dynamic range (DR) can reach 87dB with power dissipation of 65 mW. A test SDM chip for Asymmetric Digital Subscriber Line (ADSL) application is designed and implemented by TSMC 0.25 um 1P5M process.

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A 5-mW sigma-delta modulator with 84-dB dynamic range for GSM/EDGE

Cited by 49 publications

References 18 publications

Interface Circuitry and Microsystems

Interface Circuitry and Microsystems

A 14-mW, 153.6-MHz clock-rate Δ∑ modulator for WCDMA with 77-dB SFDR using constant resistance CMOS input sampling switch

Opamp gain insensitive MASH sigma delta modulator for wide bandwidth applications

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A 5-mW sigma-delta modulator with 84-dB dynamic range for GSM/EDGE

Cited by 49 publications

References 18 publications

Interface Circuitry and Microsystems

Interface Circuitry and Microsystems

A 14-mW, 153.6-MHz clock-rate &#x0394;&#x2211; modulator for WCDMA with 77-dB SFDR using constant resistance CMOS input sampling switch

Opamp gain insensitive MASH sigma delta modulator for wide bandwidth applications

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Product

Resources

About

A 14-mW, 153.6-MHz clock-rate Δ∑ modulator for WCDMA with 77-dB SFDR using constant resistance CMOS input sampling switch